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* ART: Refactor GenerateTestAndBranchDavid Brazdil2015-11-171-6/+4
| | | | | | | | | | | Each code generator implements a method for generating condition evaluation and branching to arbitrary labels. This patch refactors it for better clarity but also to generate fewer jumps when the true branch is the fallthrough successor. This is preliminary work for implementing HSelect. Change-Id: Iaa545a5ecbacb761c5aa241fa69140cf6eb5952f
* Optimizing: Determine invoke-static/-direct dispatch early.Vladimir Marko2015-10-231-0/+6
| | | | | | | | | | | | | | | | Determine the dispatch type of invoke-static/-direct in a special pass right after the type inference. This allows the inliner to pass the "needs dex cache" check and inline more. It also allows the code generator to avoid requesting a register location for the ArtMethod* for kDexCachePcRelative and direct methods. The supported dispatch check handles also situations that the CompilerDriver currently doesn't allow. The cleanup of the CompilerDriver and required changes to Quick will come in a separate change. Change-Id: I3f8e903a119949e95871d8ab0a995f4731a13a07
* Improve Thumb2 bitwise operations.Vladimir Marko2015-10-141-1/+8
| | | | | | | Allow embedding constants in AND, ORR, EOR. Add ORN to assembler, use BIC and ORN for AND and ORR when needed. Change-Id: I24d69ecc7ce6992b9c5eb7a313ff47a942de9661
* Revert "Revert "Support unresolved fields in optimizing"Calin Juravle2015-10-021-0/+35
| | | | | | | | | | | | The CL also changes the calling convetion for 64bit static field set to use kArg2 instead of kArg1. This allows optimizing to keep the asumptions: - arm pairs are always of form (even_reg, odd_reg) - ecx_edx is not used as a register on x86. This reverts commit e6f49b47b6a4dc9c7684e4483757872cfc7ff1a1. Change-Id: I93159917565824084abc96775f31be1a4249f2f3
* Optimizing: Tag arena allocations in code generators.Vladimir Marko2015-09-291-3/+3
| | | | | | | | | | | | | | | | | | | And completely remove the deprecated GrowableArray. Replace GrowableArray with ArenaVector in code generators and related classes and tag arena allocations. Label arrays use direct allocations from ArenaAllocator because Label is non-copyable and non-movable and as such cannot be really held in a container. The GrowableArray never actually constructed them, instead relying on the zero-initialized storage from the arena allocator to be correct. We now actually construct the labels. Also avoid StackMapStream::ComputeDexRegisterMapSize() being passed null references, even though unused. Change-Id: I26a46fdd406b23a3969300a67739d55528df8bf4
* ART: Refactor intrinsics slow-pathsAndreas Gampe2015-09-171-18/+5
| | | | | | | | | Refactor slow paths so that there is a default implementation for common cases (only arm64 with vixl is special). Write a generic intrinsic slow-path that can be reused for the specific architectures. Move helper functions into CodeGenerator so that they are accessible. Change-Id: Ibd788dce432601c6a9f7e6f13eab31f28dcb8550
* Revert "Support unresolved fields in optimizing"Calin Juravle2015-09-171-45/+0
| | | | | | | | breaks debuggable tests. This reverts commit 23a8e35481face09183a24b9d11e505597c75ebb. Change-Id: I8e60b5c8f48525975f25d19e5e8066c1c94bd2e5
* Support unresolved fields in optimizingCalin Juravle2015-09-171-0/+45
| | | | Change-Id: I9941fa5fcb6ef0a7a253c7a0b479a44a0210aad4
* Support unresolved methods in OptimizingCalin Juravle2015-09-171-2/+10
| | | | Change-Id: If2da02b50d2fa668cd58f134a005f1752e7746b1
* Merge "Add OptimizingCompilerStats to the CodeGenerator class."Calin Juravle2015-09-161-1/+2
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| * Add OptimizingCompilerStats to the CodeGenerator class.Serban Constantinescu2015-08-271-1/+2
| | | | | | | | | | | | | | | | Just refactoring, not yet used, but will be used by the incoming patch series and future CodeGen specific stats. Change-Id: I7d20489907b82678120518a77bdab9c4cc58f937 Signed-off-by: Serban Constantinescu <serban.constantinescu@linaro.org>
* | Optimizing: Tag arena allocations in HGraph.Vladimir Marko2015-09-161-1/+1
| | | | | | | | | | | | | | | | Replace GrowableArray with ArenaVector in HGraph and related classes HEnvironment, HLoopInformation, HInvoke and HPhi, and tag allocations with new arena allocation types. Change-Id: I3d79897af405b9a1a5b98bfc372e70fe0b3bc40d
* | Revert "Revert "Do a second check for testing intrinsic types.""Andreas Gampe2015-09-081-0/+1
|/ | | | | | | | | | | This reverts commit a14b9fef395b94fa9a32147862c198fe7c22e3d7. When an intrinsic with invoke-type virtual is recognized, replace the instruction with a new HInvokeStaticOrDirect. Minimal update for dex-cache rework. Fix includes. Change-Id: I1c8e735a2fa7cda4419f76ca0717125ef236d332
* Revert "Revert "Optimizing: Better invoke-static/-direct dispatch.""Vladimir Marko2015-08-191-0/+15
| | | | | | | | | | Fixed kCallArtMethod to use correct callee location for kRecursive. This combination is used when compiling with debuggable flag set. This reverts commit b2c431e80e92eb6437788cc544cee6c88c3156df. Change-Id: Idee0f2a794199ebdf24892c60f8a5dcf057db01c
* Revert "Optimizing: Better invoke-static/-direct dispatch."Vladimir Marko2015-08-191-15/+0
| | | | | | | | Reverting due to failing ndebug tests. This reverts commit 9b688a095afbae21112df5d495487ac5231b12d0. Change-Id: Ie4f69da6609df3b7c8443412b6cf7f5c43c2c5d9
* Optimizing: Better invoke-static/-direct dispatch.Vladimir Marko2015-08-191-0/+15
| | | | | | | | | | | | | | Add framework for different types of loading ArtMethod* and code pointer retrieval. Implement invoke-static and invoke-direct calls the same way as Quick. Document the dispatch kinds in HInvokeStaticOrDirect's new enumerations MethodLoadKind and CodePtrLocation. PC-relative loads from dex cache arrays are used only for x86-64 and arm64. The implementation for other architectures will be done in separate CLs. Change-Id: I468ca4d422dbd14748e1ba6b45289f0d31734d94
* Fuse long and FP compare & condition on ARM in Optimizing.Roland Levillain2015-07-081-0/+8
| | | | | | | | | | | Also: - Stylistic changes in corresponding parts on the x86 and x86-64 code generators. - Update and improve the documentation of art::arm::Condition. Bug: 21120453 Change-Id: If144772046e7d21362c3c2086246cb7d011d49ce
* Merge "Revert "Revert "ART: Implement try/catch blocks in Builder"""David Brazdil2015-06-261-0/+1
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| * Revert "Revert "ART: Implement try/catch blocks in Builder""David Brazdil2015-06-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the GraphBuilder to generate blocks and edges which represent the exceptional control flow when try/catch blocks are present in the code. Actual compilation is still delegated to Quick and Baseline ignores the additional code. To represent the relationship between try and catch blocks, Builder splits the edges which enter/exit a try block and links the newly created blocks to the corresponding exception handlers. This layout will later enable the SsaBuilder to correctly infer the dominators of the catch blocks and to produce the appropriate reverse post ordering. It will not, however, allow for building the complete SSA form of the catch blocks and consequently optimizing such blocks. To this end, a new TryBoundary control-flow instruction is introduced. Codegen treats it the same as a Goto but it allows for additional successors (the handlers). This reverts commit 3e18738bd338e9f8363b26bc895f38c0ec682824. Change-Id: I4f5ea961848a0b83d8db3673763861633e9bfcfb
| * Revert "ART: Implement try/catch blocks in Builder"David Brazdil2015-06-261-1/+0
| | | | | | | | | | | | | | | | Causes OutOfMemory issues, need to investigate. This reverts commit 0b5c7d1994b76090afcc825e737f2b8c546da2f8. Change-Id: I263e6cc4df5f9a56ad2ce44e18932ca51d7e349f
| * ART: Implement try/catch blocks in BuilderDavid Brazdil2015-06-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the GraphBuilder to generate blocks and edges which represent the exceptional control flow when try/catch blocks are present in the code. Actual compilation is still delegated to Quick and Baseline ignores the additional code. To represent the relationship between try and catch blocks, Builder splits the edges which enter/exit a try block and links the newly created blocks to the corresponding exception handlers. This layout will later enable the SsaBuilder to correctly infer the dominators of the catch blocks and to produce the appropriate reverse post ordering. It will not, however, allow for building the complete SSA form of the catch blocks and consequently optimizing such blocks. To this end, a new TryBoundary control-flow instruction is introduced. Codegen treats it the same as a Goto but it allows for additional successors (the handlers). Change-Id: I415b985596d5bebb7b1bb358a46e08b7b04bb53a
* | Minor fixes to mips64 for the arch-specific optimisation framework.Alexandre Rames2015-06-241-2/+2
|/ | | | Change-Id: I9d49ea61c732e4fc6b3393aa8778951e29ce4efe
* Do not overwrite an input register in shift operations.Nicolas Geoffray2015-06-231-0/+1
| | | | | | | | 'second_reg' is an input register that can survive the instruction. Instead use the output register as a temporary result. bug:21667432 Change-Id: I1a4577b0333c3fb184645023d5eae30555bbf65c
* Opt compiler: Add disassembly to the '.cfg' output.Alexandre Rames2015-06-221-0/+4
| | | | | | | This is automatically added to the '.cfg' output when using the usual `--dump-cfg` option. Change-Id: I864bfc3a8299c042e72e451cc7730ad8271e4deb
* Revert "Revert "ART: Implement literal pool for arm, fix branch fixup.""Vladimir Marko2015-06-171-0/+2
| | | | | | | | | This reverts commit fbeb4aede0ddc5b1e6a5a3a40cc6266fe8518c98. Adjust block label positions. Bad catch block labels were the reason for the revert. Change-Id: Ia6950d639d46b9da6b07f3ade63ab46d03d63310
* Merge "Revert "ART: Implement literal pool for arm, fix branch fixup.""Vladimir Marko2015-06-161-2/+0
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| * Revert "ART: Implement literal pool for arm, fix branch fixup."Vladimir Marko2015-06-161-2/+0
| | | | | | | | | | | | | | This reverts commit f38caa68cce551fb153dff37d01db518e58ed00f. Change-Id: Id88b82cc949d288cfcdb3c401b96f884b777fc40 Reason: broke the tests.
* | Merge "ART: Implement literal pool for arm, fix branch fixup."Vladimir Marko2015-06-161-0/+2
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| * ART: Implement literal pool for arm, fix branch fixup.Vladimir Marko2015-06-151-0/+2
| | | | | | | | Change-Id: Iecc91418bb4ee1c957f42fefb737d0ee2ba960e7
| * Revert "Use HCurrentMethod in HInvokeStaticOrDirect."Nicolas Geoffray2015-06-041-1/+1
| | | | | | | | | | | | | | | | Fails on baseline/x86. This reverts commit 38207af82afb6f99c687f64b15601ed20d82220a. Change-Id: Ib71018367eb7c6046965494a7e996c22af3de403
* | Add boilerplate code for architecture-specific HInstructions.Alexandre Rames2015-06-101-2/+14
| | | | | | | | Change-Id: I2723cd96e5f03012c840863dd38d7b2168117db8
* | Revert "Revert "Pass current method to HNewInstance and HNewArray.""Nicolas Geoffray2015-06-091-3/+0
| | | | | | | | | | | | | | | | | | Problem exposed by this change was fixed in: https://android-review.googlesource.com/#/c/154031/ This reverts commit 7b0e353b49ac3f464c662f20e20e240f0231afff. Change-Id: I680c13dc9db9ba223ab11c7af255222860b4e6d2
* | Revert "Pass current method to HNewInstance and HNewArray."Nicolas Geoffray2015-06-091-0/+3
| | | | | | | | | | | | | | | | 082-inline-execute fails on x86. This reverts commit e21aa42e1341d34250742abafdd83311ad9fa737. Change-Id: Ib3fd25faee2e0128001e40d3d51a74f959bc4449
* | Pass current method to HNewInstance and HNewArray.Nicolas Geoffray2015-06-081-3/+0
|/ | | | | | Also remove unsed CodeGenerator::LoadCurrentMethod. Change-Id: I4b8d3f2a30b8e2c76b6b329a72555483c993cb73
* Use HCurrentMethod in HInvokeStaticOrDirect.Nicolas Geoffray2015-06-041-1/+1
| | | | Change-Id: I0d15244b6b44c8b10079398c55da5071a3e3af66
* Factorize code for common LocationSummary of HInvoke.Nicolas Geoffray2015-06-031-1/+2
| | | | | | | This is one step forward, we could factorize more, but I wanted to get this out of the way first. Change-Id: I6ae411a737eebaecb64974f47af507ce0cfbae85
* Move mirror::ArtMethod to nativeMathieu Chartier2015-05-291-2/+4
| | | | | | | | | | | | | Optimizing + quick tests are passing, devices boot. TODO: Test and fix bugs in mips64. Saves 16 bytes per most ArtMethod, 7.5MB reduction in system PSS. Some of the savings are from removal of virtual methods and direct methods object arrays. Bug: 19264997 Change-Id: I622469a0cfa0e7082a2119f3d6a9491eb61e3f3d
* Don't do a null test in MarkGCCard if the value cannot be null.Nicolas Geoffray2015-05-181-2/+4
| | | | Change-Id: I45687f6d3505178e2fc3689eac9cb6ab1b2c1e29
* Opt compiler: Speedup div/rem by constants on arm32 and arm64.Zheng Xu2015-05-151-0/+4
| | | | | | | | | | | | | | | This patch also includes: 1. Add java test for div/rem negative constants. 2. Fix a thumb2 encoding issue where the last operand is "reg, shift #amount" in some instructions. 3. Support a simple filter in arm32 assembler test to filter out unsupported cases, such as "smull r0, r0, r1, r2". 4. Add smull arm32 assembler test. 5. Add smull/umull thumb2 test. 6. Add test for the thumb2 encoding issue which is fixed in this patch. Change-Id: I1601bc9c38f70f11909f2816fe3ec105a158951e
* Refactor InvokeDexCallingConventionVisitor in Optimizing.Roland Levillain2015-04-291-10/+7
| | | | Change-Id: I7ede0f59d5109644887bf5d39201d4e1bf043f34
* Opt compiler: Implement parallel move resolver without using swap.Zheng Xu2015-04-171-2/+2
| | | | | | | | | | | | | | | | | | The algorithm of ParallelMoveResolverNoSwap() is almost the same with ParallelMoveResolverWithSwap(), except the way we resolve the circular dependency. NoSwap() uses additional scratch register to resolve the circular dependency. For example, (0->1) (1->2) (2->0) will be performed as (2->scratch) (1->2) (0->1) (scratch->0). On architectures without swap register support, NoSwap() can reduce the number of moves from 3x(N-1) to (N+1) when there is circular dependency with N moves. And also, NoSwap() algorithm does not depend on architecture register layout information, which means it can support register pairs on arm32 and X/W, D/S registers on arm64 without additional modification. Change-Id: Idf56bd5469bb78c0e339e43ab16387428a082318
* Revert "Revert "Deoptimization-based bce.""Mingyao Yang2015-04-011-0/+4
| | | | | | This reverts commit 0ba627337274ccfb8c9cb9bf23fffb1e1b9d1430. Change-Id: I1ca10d15bbb49897a0cf541ab160431ec180a006
* Intrinsify String.compareTo.Nicolas Geoffray2015-03-271-0/+19
| | | | Change-Id: Ia540df98755ac493fe61bd63f0bd94f6d97fbb57
* Revert "Deoptimization-based bce."Andreas Gampe2015-03-241-4/+0
| | | | | | | | | | This breaks compiling the core image: Error after BCE: art::SSAChecker: Instruction 219 in block 1 does not dominate use 221 in block 1. This reverts commit e295e6ec5beaea31be5d7d3c996cd8cfa2053129. Change-Id: Ieeb48797d451836ed506ccb940872f1443942e4e
* Deoptimization-based bce.Mingyao Yang2015-03-231-0/+4
| | | | | | | | | | | | | | | | | | | A mechanism is introduced that a runtime method can be called from code compiled with optimizing compiler to deoptimize into interpreter. This can be used to establish invariants in the managed code If the invariant does not hold at runtime, we will deoptimize and continue execution in the interpreter. This allows to optimize the managed code as if the invariant was proven during compile time. However, the exception will be thrown according to the semantics demanded by the spec. The invariant and optimization included in this patch are based on the length of an array. Given a set of array accesses with constant indices {c1, ..., cn}, we can optimize away all bounds checks iff all 0 <= min(ci) and max(ci) < array-length. The first can be proven statically. The second can be established with a deoptimization-based invariant. This replaces n bounds checks with one invariant check (plus slow-path code). Change-Id: I8c6e34b56c85d25b91074832d13dba1db0a81569
* Update locations of registers after slow paths spilling.Nicolas Geoffray2015-03-161-1/+2
| | | | Change-Id: Id9aafcc13c1a085c17ce65d704c67b73f9de695d
* Avoid generating jmp +0.Nicolas Geoffray2015-02-181-1/+1
| | | | | | | When a block branches to a non-following block, but blocks in-between do branch to it, we can avoid doing the branch. Change-Id: I9b343f662a4efc718cd4b58168f93162a24e1219
* ART: Arm intrinsics for Optimizing compilerAndreas Gampe2015-02-091-0/+24
| | | | | | Add arm32 intrinsics to the optimizing compiler. Change-Id: If4aeedbf560862074d8ee08ca4484b666d6b9bf0
* Small optimization for recursive calls: avoid dex cache.Nicolas Geoffray2015-01-291-0/+3
| | | | Change-Id: I044757a2f06e535cdc1480c4fc8182b89635baf6
* Support callee-save registers on ARM.Nicolas Geoffray2015-01-241-0/+2
| | | | Change-Id: I7c519b7a828c9891b1141a8e51e12d6a8bc84118
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