| Commit message (Collapse) | Author | Age | Files | Lines |
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This reverts commit 7e3652c45c30c1f2f840e6088e24e2db716eaea7.
Change-Id: Ib489440c34e41cba9e9e297054f9274f6e81a2d8
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Change-Id: Ibfc47026596c868fb6d48465a6e564a0b1e07fd0
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For now just stack allocate the code generator. Will think
about cleaning up the root problem later (CodeGenerator being an
arena object).
Change-Id: I161a6f61c5f27ea88851b446f3c1e12ee9c594d7
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The runtime is not initialized completely in gtests, so we
cannot run code (such as explicit stack overflow checks) that
look at tls values.
Change-Id: I74a4449b01eb203f1b411dda700e9459878d0d55
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Change-Id: I2b058f4433504dc3299c06f5cb0b5ab12f34aa82
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Tests run ok on my host/target. I reverted the move to
using thumb2, because tests were crashing. But I could not
reproduce file limits issues.
Make SignalTest as crashing for optimizing. We need to implement
stack overflow checks.
Change-Id: Ieda575501eaf30af7aaa2c44e71544c9c467c24f
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This reverts commit 20550910e608ed7d86db97927d2ce9d2191061a4.
Change-Id: Ic28b719946c795378838a18162a2a2b2cf41a0e8
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Tests run ok on my host/target. I reverted the move to
using thumb2, because tests were crashing. But I could not
reproduce file limits issues.
Change-Id: I26bc4ec1eb6c227750d11210e012d9d3b1d824af
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This adds a few more DEX instructions to the optimizing compiler's
builder (constants, moves, if_xx, etc).
Also:
* Changes the codegen for IF_XX instructions to use a condition
rather than comparing a value against 0.
* Fixes some instructions in the ARM disassembler.
* Fixes PushList and PopList in the thumb2 assembler.
* Switches the assembler for the optimizing compiler to thumb2
rather than ARM.
Change-Id: Iaafcd02243ccc5b03a054ef7a15285b84c06740f
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Change-Id: I0dc210d2734e95714bed6c481a31fa4daabb9332
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Change-Id: I4462d9ae15be56c4a3dc1bd4d1c0c6548c1b94be
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This CL implements:
1) Resolution after allocation: connecting the locations
allocated to an interval within a block and between blocks.
2) Handling of fixed registers: some instructions require
inputs/output to be at a specific location, and the allocator
needs to deal with them in a special way.
3) ParallelMoveResolver::EmitNativeCode for x86.
Change-Id: I0da6bd7eb66877987148b87c3be6a983b4e3f858
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Also remove the Android.libcxx.mk and other bits of stlport compatibility
mechanics.
Change-Id: Icdf7188ba3c79cdf5617672c1cfd0a68ae596a61
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Change-Id: I5524e193cd07f2692a57c6b4f8069904471b2928
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Also rename accessors to ART's conventions.
Change-Id: I344807055b98aa4b27215704ec362191464acecc
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Change-Id: If4c13775f8e1fd0fd26b4a731f3011c77b0bfed1
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- Add HReturn instruction
- Generate code for locals/if/return
- Setup infrastructure for register allocation. Currently
emulate a stack.
Change-Id: Ib28c2dba80f6c526177ed9a7b09c0689ac8122fb
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Also make if take an input and build the use list for instructions.
Change-Id: I1938cee7dce5bd4c66b259fa2b431d2c79b3cf82
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Change-Id: I9aae76908ff1d6e64fb71a6718fc1426b67a5c28
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