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path: root/vm/compiler/codegen/arm/ArchUtility.c
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Diffstat (limited to 'vm/compiler/codegen/arm/ArchUtility.c')
-rw-r--r--vm/compiler/codegen/arm/ArchUtility.c49
1 files changed, 39 insertions, 10 deletions
diff --git a/vm/compiler/codegen/arm/ArchUtility.c b/vm/compiler/codegen/arm/ArchUtility.c
index 60c5cdb86..551e1f753 100644
--- a/vm/compiler/codegen/arm/ArchUtility.c
+++ b/vm/compiler/codegen/arm/ArchUtility.c
@@ -79,9 +79,20 @@ static void buildInsnString(char *fmt, ArmLIR *lir, char* buf,
strcpy(tbuf, "!");
} else {
assert(fmt < fmtEnd);
- assert((unsigned)(nc-'0') < 3);
+ assert((unsigned)(nc-'0') < 4);
operand = lir->operands[nc-'0'];
switch(*fmt++) {
+ case 'b':
+ strcpy(tbuf,"0000");
+ for (i=3; i>= 0; i--) {
+ tbuf[i] += operand & 1;
+ operand >>= 1;
+ }
+ break;
+ case 'n':
+ operand = ~expandImmediate(operand);
+ sprintf(tbuf,"%d [0x%x]", operand, operand);
+ break;
case 'm':
operand = expandImmediate(operand);
sprintf(tbuf,"%d [0x%x]", operand, operand);
@@ -111,28 +122,28 @@ static void buildInsnString(char *fmt, ArmLIR *lir, char* buf,
case 'c':
switch (operand) {
case ARM_COND_EQ:
- strcpy(tbuf, "beq");
+ strcpy(tbuf, "eq");
break;
case ARM_COND_NE:
- strcpy(tbuf, "bne");
+ strcpy(tbuf, "ne");
break;
case ARM_COND_LT:
- strcpy(tbuf, "blt");
+ strcpy(tbuf, "lt");
break;
case ARM_COND_GE:
- strcpy(tbuf, "bge");
+ strcpy(tbuf, "ge");
break;
case ARM_COND_GT:
- strcpy(tbuf, "bgt");
+ strcpy(tbuf, "gt");
break;
case ARM_COND_LE:
- strcpy(tbuf, "ble");
+ strcpy(tbuf, "le");
break;
case ARM_COND_CS:
- strcpy(tbuf, "bcs");
+ strcpy(tbuf, "cs");
break;
case ARM_COND_MI:
- strcpy(tbuf, "bmi");
+ strcpy(tbuf, "mi");
break;
default:
strcpy(tbuf, "");
@@ -193,8 +204,19 @@ static void dumpLIRInsn(LIR *arg, unsigned char *baseAddr)
u2 *cPtr = (u2*)baseAddr;
/* Handle pseudo-ops individually, and all regular insns as a group */
switch(lir->opCode) {
+ case ARM_PSEUDO_IT_BOTTOM:
+ LOGD("-------- IT_Bottom");
+ break;
+ case ARM_PSEUDO_EXTENDED_MIR:
+ /* intentional fallthrough */
+ case ARM_PSEUDO_SSA_REP:
+ LOGD("-------- %s\n", (char *) dest);
+ break;
case ARM_PSEUDO_TARGET_LABEL:
break;
+ case ARM_PSEUDO_CHAINING_CELL_BACKWARD_BRANCH:
+ LOGD("-------- chaining cell (backward branch): 0x%04x\n", dest);
+ break;
case ARM_PSEUDO_CHAINING_CELL_NORMAL:
LOGD("-------- chaining cell (normal): 0x%04x\n", dest);
break;
@@ -209,10 +231,16 @@ static void dumpLIRInsn(LIR *arg, unsigned char *baseAddr)
((Method *)dest)->name,
((Method *)dest)->insns);
break;
+ case ARM_PSEUDO_ENTRY_BLOCK:
+ LOGD("-------- entry offset: 0x%04x\n", dest);
+ break;
case ARM_PSEUDO_DALVIK_BYTECODE_BOUNDARY:
LOGD("-------- dalvik offset: 0x%04x @ %s\n", dest,
getOpcodeName(lir->operands[1]));
break;
+ case ARM_PSEUDO_EXIT_BLOCK:
+ LOGD("-------- exit offset: 0x%04x\n", dest);
+ break;
case ARM_PSEUDO_ALIGN4:
LOGD("%p (%04x): .align4\n", baseAddr + offset, offset);
break;
@@ -258,7 +286,8 @@ void dvmCompilerCodegenDump(CompilationUnit *cUnit)
for (lirInsn = cUnit->wordList; lirInsn; lirInsn = lirInsn->next) {
armLIR = (ArmLIR *) lirInsn;
LOGD("%p (%04x): .word (0x%x)\n",
- (char*)cUnit->baseAddr + armLIR->generic.offset, armLIR->generic.offset,
+ (char*)cUnit->baseAddr + armLIR->generic.offset,
+ armLIR->generic.offset,
armLIR->operands[0]);
}
}