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Diffstat (limited to 'vm/compiler/codegen/arm/CodegenDriver.c')
-rw-r--r--vm/compiler/codegen/arm/CodegenDriver.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/vm/compiler/codegen/arm/CodegenDriver.c b/vm/compiler/codegen/arm/CodegenDriver.c
index f625771ec..a28e4114d 100644
--- a/vm/compiler/codegen/arm/CodegenDriver.c
+++ b/vm/compiler/codegen/arm/CodegenDriver.c
@@ -1214,6 +1214,8 @@ static void genInterpSingleStep(CompilationUnit *cUnit, MIR *mir)
opReg(cUnit, kOpBlx, r2);
}
+#if defined(WITH_DEADLOCK_PREDICTION) || defined(WITH_MONITOR_TRACKING) || \
+ defined(_ARMV5TE) || defined(_ARMV5TE_VFP)
/*
* To prevent a thread in a monitor wait from blocking the Jit from
* resetting the code cache, heavyweight monitor lock will not
@@ -1259,6 +1261,7 @@ static void genMonitorPortable(CompilationUnit *cUnit, MIR *mir)
dvmCompilerClobberCallRegs(cUnit);
}
}
+#endif
/*
* The following are the first-level codegen routines that analyze the format
@@ -3643,6 +3646,16 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit)
labelList[i].operands[0] = blockList[i]->startOffset;
if (blockList[i]->blockType >= kChainingCellGap) {
+ if (blockList[i]->firstMIRInsn != NULL &&
+ ((blockList[i]->firstMIRInsn->dalvikInsn.opCode ==
+ OP_MOVE_RESULT) ||
+ (blockList[i]->firstMIRInsn->dalvikInsn.opCode ==
+ OP_MOVE_RESULT_WIDE) ||
+ (blockList[i]->firstMIRInsn->dalvikInsn.opCode ==
+ OP_MOVE_RESULT_OBJECT))) {
+ /* Align this block first since it is a return chaining cell */
+ newLIR0(cUnit, kArmPseudoPseudoAlign4);
+ }
/*
* Append the label pseudo LIR first. Chaining cells will be handled
* separately afterwards.