diff options
Diffstat (limited to 'vm/compiler/codegen/arm/CodegenDriver.cpp')
| -rw-r--r-- | vm/compiler/codegen/arm/CodegenDriver.cpp | 159 |
1 files changed, 6 insertions, 153 deletions
diff --git a/vm/compiler/codegen/arm/CodegenDriver.cpp b/vm/compiler/codegen/arm/CodegenDriver.cpp index 7346c835e..ad8fd81ff 100644 --- a/vm/compiler/codegen/arm/CodegenDriver.cpp +++ b/vm/compiler/codegen/arm/CodegenDriver.cpp @@ -398,149 +398,6 @@ static void genIPut(CompilationUnit *cUnit, MIR *mir, OpSize size, } } - -/* - * Generate array load - */ -static void genArrayGet(CompilationUnit *cUnit, MIR *mir, OpSize size, - RegLocation rlArray, RegLocation rlIndex, - RegLocation rlDest, int scale) -{ - RegisterClass regClass = dvmCompilerRegClassBySize(size); - int lenOffset = OFFSETOF_MEMBER(ArrayObject, length); - int dataOffset = OFFSETOF_MEMBER(ArrayObject, contents); - RegLocation rlResult; - rlArray = loadValue(cUnit, rlArray, kCoreReg); - rlIndex = loadValue(cUnit, rlIndex, kCoreReg); - int regPtr; - - /* null object? */ - ArmLIR * pcrLabel = NULL; - - if (!(mir->OptimizationFlags & MIR_IGNORE_NULL_CHECK)) { - pcrLabel = genNullCheck(cUnit, rlArray.sRegLow, - rlArray.lowReg, mir->offset, NULL); - } - - regPtr = dvmCompilerAllocTemp(cUnit); - - if (!(mir->OptimizationFlags & MIR_IGNORE_RANGE_CHECK)) { - int regLen = dvmCompilerAllocTemp(cUnit); - /* Get len */ - loadWordDisp(cUnit, rlArray.lowReg, lenOffset, regLen); - /* regPtr -> array data */ - opRegRegImm(cUnit, kOpAdd, regPtr, rlArray.lowReg, dataOffset); - genBoundsCheck(cUnit, rlIndex.lowReg, regLen, mir->offset, - pcrLabel); - dvmCompilerFreeTemp(cUnit, regLen); - } else { - /* regPtr -> array data */ - opRegRegImm(cUnit, kOpAdd, regPtr, rlArray.lowReg, dataOffset); - } - if ((size == kLong) || (size == kDouble)) { - if (scale) { - int rNewIndex = dvmCompilerAllocTemp(cUnit); - opRegRegImm(cUnit, kOpLsl, rNewIndex, rlIndex.lowReg, scale); - opRegReg(cUnit, kOpAdd, regPtr, rNewIndex); - dvmCompilerFreeTemp(cUnit, rNewIndex); - } else { - opRegReg(cUnit, kOpAdd, regPtr, rlIndex.lowReg); - } - rlResult = dvmCompilerEvalLoc(cUnit, rlDest, regClass, true); - - HEAP_ACCESS_SHADOW(true); - loadPair(cUnit, regPtr, rlResult.lowReg, rlResult.highReg); - HEAP_ACCESS_SHADOW(false); - - dvmCompilerFreeTemp(cUnit, regPtr); - storeValueWide(cUnit, rlDest, rlResult); - } else { - rlResult = dvmCompilerEvalLoc(cUnit, rlDest, regClass, true); - - HEAP_ACCESS_SHADOW(true); - loadBaseIndexed(cUnit, regPtr, rlIndex.lowReg, rlResult.lowReg, - scale, size); - HEAP_ACCESS_SHADOW(false); - - dvmCompilerFreeTemp(cUnit, regPtr); - storeValue(cUnit, rlDest, rlResult); - } -} - -/* - * Generate array store - * - */ -static void genArrayPut(CompilationUnit *cUnit, MIR *mir, OpSize size, - RegLocation rlArray, RegLocation rlIndex, - RegLocation rlSrc, int scale) -{ - RegisterClass regClass = dvmCompilerRegClassBySize(size); - int lenOffset = OFFSETOF_MEMBER(ArrayObject, length); - int dataOffset = OFFSETOF_MEMBER(ArrayObject, contents); - - int regPtr; - rlArray = loadValue(cUnit, rlArray, kCoreReg); - rlIndex = loadValue(cUnit, rlIndex, kCoreReg); - - if (dvmCompilerIsTemp(cUnit, rlArray.lowReg)) { - dvmCompilerClobber(cUnit, rlArray.lowReg); - regPtr = rlArray.lowReg; - } else { - regPtr = dvmCompilerAllocTemp(cUnit); - genRegCopy(cUnit, regPtr, rlArray.lowReg); - } - - /* null object? */ - ArmLIR * pcrLabel = NULL; - - if (!(mir->OptimizationFlags & MIR_IGNORE_NULL_CHECK)) { - pcrLabel = genNullCheck(cUnit, rlArray.sRegLow, rlArray.lowReg, - mir->offset, NULL); - } - - if (!(mir->OptimizationFlags & MIR_IGNORE_RANGE_CHECK)) { - int regLen = dvmCompilerAllocTemp(cUnit); - //NOTE: max live temps(4) here. - /* Get len */ - loadWordDisp(cUnit, rlArray.lowReg, lenOffset, regLen); - /* regPtr -> array data */ - opRegImm(cUnit, kOpAdd, regPtr, dataOffset); - genBoundsCheck(cUnit, rlIndex.lowReg, regLen, mir->offset, - pcrLabel); - dvmCompilerFreeTemp(cUnit, regLen); - } else { - /* regPtr -> array data */ - opRegImm(cUnit, kOpAdd, regPtr, dataOffset); - } - /* at this point, regPtr points to array, 2 live temps */ - if ((size == kLong) || (size == kDouble)) { - //TODO: need specific wide routine that can handle fp regs - if (scale) { - int rNewIndex = dvmCompilerAllocTemp(cUnit); - opRegRegImm(cUnit, kOpLsl, rNewIndex, rlIndex.lowReg, scale); - opRegReg(cUnit, kOpAdd, regPtr, rNewIndex); - dvmCompilerFreeTemp(cUnit, rNewIndex); - } else { - opRegReg(cUnit, kOpAdd, regPtr, rlIndex.lowReg); - } - rlSrc = loadValueWide(cUnit, rlSrc, regClass); - - HEAP_ACCESS_SHADOW(true); - storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg); - HEAP_ACCESS_SHADOW(false); - - dvmCompilerFreeTemp(cUnit, regPtr); - } else { - rlSrc = loadValue(cUnit, rlSrc, regClass); - - HEAP_ACCESS_SHADOW(true); - storeBaseIndexed(cUnit, regPtr, rlIndex.lowReg, rlSrc.lowReg, - scale, size); - HEAP_ACCESS_SHADOW(false); - } -} - /* * Generate array object store * Must use explicit register allocation here because of @@ -1390,7 +1247,7 @@ static void genInterpSingleStep(CompilationUnit *cUnit, MIR *mir) opReg(cUnit, kOpBlx, r2); } -#if defined(_ARMV5TE) || defined(_ARMV5TE_VFP) +#if defined(_ARMV5TE) || defined(_ARMV5TE_VFP) || defined(_ARMV6J) || defined(_ARMV6_VFP) /* * To prevent a thread in a monitor wait from blocking the Jit from * resetting the code cache, heavyweight monitor lock will not @@ -2113,9 +1970,6 @@ static bool handleFmt21t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0); rlSrc = loadValue(cUnit, rlSrc, kCoreReg); - opRegImm(cUnit, kOpCmp, rlSrc.lowReg, 0); - -//TUNING: break this out to allow use of Thumb2 CB[N]Z switch (dalvikOpcode) { case OP_IF_EQZ: cond = kArmCondEq; @@ -2140,7 +1994,8 @@ static bool handleFmt21t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb, ALOGE("Unexpected opcode (%d) for Fmt21t", dalvikOpcode); dvmCompilerAbort(cUnit); } - genConditionalBranch(cUnit, cond, &labelList[bb->taken->id]); + ArmLIR* branch = genCmpImmBranch(cUnit, cond, rlSrc.lowReg, 0); + branch->generic.target = (LIR*)&labelList[bb->taken->id]; /* This mostly likely will be optimized away in a later phase */ genUnconditionalBranch(cUnit, &labelList[bb->fallThrough->id]); return false; @@ -2259,10 +2114,7 @@ static bool handleEasyMultiply(CompilationUnit *cUnit, } else { // Reverse subtract: (src << (shift + 1)) - src. assert(powerOfTwoMinusOne); - // TODO: rsb dst, src, src lsl#lowestSetBit(lit + 1) - int tReg = dvmCompilerAllocTemp(cUnit); - opRegRegImm(cUnit, kOpLsl, tReg, rlSrc.lowReg, lowestSetBit(lit + 1)); - opRegRegReg(cUnit, kOpSub, rlResult.lowReg, tReg, rlSrc.lowReg); + genMultiplyByShiftAndReverseSubtract(cUnit, rlSrc, rlResult, lowestSetBit(lit + 1)); } storeValue(cUnit, rlDest, rlResult); return true; @@ -3843,7 +3695,7 @@ static void handlePCReconstruction(CompilationUnit *cUnit, * We should never reach here through fall-through code, so insert * a bomb to signal troubles immediately. */ - if (numElems) { + if ((numElems) || (cUnit->jitMode == kJitLoop)) { newLIR0(cUnit, kThumbUndefined); } @@ -4498,6 +4350,7 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit) (LIR *) cUnit->loopAnalysis->branchToBody); dvmCompilerAppendLIR(cUnit, (LIR *) cUnit->loopAnalysis->branchToPCR); + cUnit->loopAnalysis->branchesAdded = true; } if (headLIR) { |
