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It is just a native callout helper function.
Change-Id: I6398b6876f5ba579b76e732107157a4c99337796
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* commit 'a85893356ac4d86ef7d7dd18807d7bef95d7dddb':
[Jit] Fix for 3311468 Maps crashed at handleFmt...
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Change https://android-git.corp.google.com/g/#change,86452 eliminated unused
chaining cells for direct JNI calls. However, a code path in CodegenDriver.c
assumed all similar invokes would have such cells. Slightly re-arranged the
to avoid relying on the existance of the cell in cases in which it isn't
needed.
Change-Id: Ifc28acf559455a292b4b915ef1302085557e1d81
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* commit '0d1aac383a4bdce9feaad2f614df42234c2dcced':
Revert "Remove inline natives for an unused performance test."
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This reverts commit 7ecd89dc02ce00c425788bd4989bdb6cde9a618a.
Change-Id: I427635b7e3f7be45cfde78b8046dab3b23b64562
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* commit '7ecd89dc02ce00c425788bd4989bdb6cde9a618a':
Remove inline natives for an unused performance test.
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Change-Id: I80cfb918bdf174aeb6de83909c840563f6b945dd
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In preparation for method compilation, this CL causes all traces to
include two entry points: profiling and non-profiling. For now, the
profiling entry will only be used if dalvik is run with -Xjitprofile,
and largely works like it did before. The difference is that profiling
support no longer requires the "assert" build - it's always there now.
This will enable us to do a form of sampling profiling of
traces in order to identify hot methods or hot trace groups,
while keeping the overhead low by only switching profiling on periodically.
To turn the periodic profiling on and off, we simply unchain all existing
translations and set the appropriate global profile state. The underlying
translation lookup and chaining utilties will examine the profile state to
determine which entry point to use (i.e. - profiling or non-profiling) while
the traces naturally rechain during further execution.
Change-Id: I9ee33e69e33869b9fab3a57e88f9bc524175172b
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Remove vestiges of code intended for linear scan register allocation
in the trace compiler. New plan is to stick with local allocation for
traces and build a new linear scan allocator for the method compiler.
Change-Id: Ic265ab5a7936b144cbe7fa4dc667fa7aba579045
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Nuked a void* cast warnings and moved cacheflush into a target-specific
utility wrapper.
Change-Id: I36c841288b9ec7e03c0cb29b2e89db344f36fad1
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Change-Id: I8828bc628f110aaade578a197bf1f51b30bf1be7
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Change-Id: If3fb3a36f33aaee8e5fdded4e9fa607be54f0bfb
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Experimental support for trace selection for x86 host mode operation.
Not enabled by default. Turned on by setting WITH_HOST_DALVIK true
and WITH_JIT true. When enabled, profiles during x86 fast interpreter
operation, selects hot traces and "compiles" traces consisting of jumps
back to the interpreter.
First in a series of experimental x86 support checkins.
Change-Id: I0e423ec58a7bf01f226cb486f55de2841fab1002
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Change-Id: I06292964a6882ea2d0c17c5c962db95e46b01543
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kNumDalvikInstructions is now kNumPackedOpcodes, there is a new
kMaxOpcodeValue, and both are generated by opcode-gen.
Change-Id: Ic46f1f52d2d21382452c8e777024f4a985ad31d3
Bonus: Reworded the switch and array data comment for clarity.
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With this change, it's still implemented as an unused opcode, but
it's now ready for its new life!
Change-Id: Ic70d311704925067e47d87b657d133a792144e65
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A lot of this is more about properties of opcodes as opposed to
inspecting instructions per se, and the new naming attempts to
make it clear what is being queried and what sort of data is being
returned.
Change-Id: Ice6f9f2ebf4f1cfa8c99597419aa13d1134a33b2
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Similarly "Opcode" not "OpCode".
This appears to be the general worldwide consensus on the matter. Other
residents of my office didn't seem to mind one way or the other how it's
spelled in our code, but for whatever reason, it really bugged me.
Change-Id: Ia0b73d19c54aefc0f543a9c9451dda22ee876a59
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Also incorporate the former contents of OpCodeNames.h. This is a small
attempt to increase naming consistency in libdex. There will be a bit
more to come, in a follow-up.
Change-Id: Ia7ab06042dde2e19eda02ef1fee72fb4260e899d
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In particular, use it instead of just saying 256, and similarly for
255. The number of opcodes will be changing soon.
Change-Id: Icc77120c2673968dddd6b4003f717245d46e4159
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This inclduded fixing all the accessor functions to refer to the
global ones defined in InstrUtils.[ch] instead of taking separate
"table pointer" arguments.
This did end up adding a few more truly global references to some of
the code paths, particularly when performing dex optimization, so I
went ahead and measured the time to do a cold first-boot both before
and after the change (on real hardware). The times were identical (to
one-second granularity), so I'm reasonably comfortable making this
change.
Change-Id: I604d9f7882bad4245bb11371218d13b06c3a5375
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At one point, returning a negative width for dexopt output was useful.
That stopped being the case a long time ago.
This also removes a bad assert that went into my previous checkin.
Change-Id: I18880c2316f5499a09dc479d271ca70b2a5be259
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* commit '72ef412b56becfbdd54f239ea672a48b163ff1d2':
Fix uninitialized variable warning(error).
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Change-Id: I10815b033199758976950b28af7cc412f093a7f5
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My local build wasn't doing Thumb2. Unsurprising in retrospect.
Change-Id: I38ab4dc80e1115cf459f6d890c7d0eb2705fa7c9
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This is in prep for -- recurring theme here -- adding the new extended
opcode formats. It turns out that we can avoid a lot of duplicated code
if we determine the type of thing referred to in index-bearing instructions
inside the general instruction decoder. To do so straightforwardly, this
means adding a new opcode info table and then passing it into the decoder.
Rather than add another argument to the decoder, I defined a struct to
contain all the info tables together, and a pointer to that can get passed
in.
I simplified the setting up of the info tables, too, so all the
allocation is handled within InstrUtils, rather than being (partially)
duplicated in a couple places. The only downside is that dexdump will
construct one more table than it actually needs, but given that
construction is quick and the table is only 256 bytes (though will
soon be growing to -- gasp! -- 294 bytes), I figure it's not such a
big deal.
Most of the files that changed only had edits for how to refer to these
info tables.
Change-Id: Ia6f1cb25da6e558ac90c6dd3af6bce36b82a6b4d
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In particular, I altered the naming of some instruction format fields
as well as the names of instruction formats themselves, all in an attempt
to make the implementation be a more straightforward match of the spec.
This patch mostly changes comments to reflect the new harmonized
reality. The only "code-like" change is the renaming of kFmt3inline
and kFmt3rinline to kFmt35mi and kFmt3rmi (respectively), which is
what they're called in the spec.
Bonus: Added the new extended opcode instruction formats to
InstrUtils.h, though I left them commented out for now.
Change-Id: I0109f361c1e9b6f0308c45e8cda5320e9ad3060c
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Change-Id: I0731a0f623694d15d311dae1450a50e105905421
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Slight reworking of the memory barrier instruction generation to
generalize it, and then add "dmb st" for the new return-void-barrier
instruction.
Change-Id: Iad95aa5b0ba9b616a17dcbe4c6ca2e3906bb49dc
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1) Initialize the register and out sizes for callee methods through
constant moves.
2) Eliminate an unnecessary load of Dalvik PC for chained and
native callees.
Improved method invocation performance by ~3%.
Change-Id: Iead1276eed0ba527e82eb876f08d169ab9b496b2
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Most of CodegenFactory.c is at a high-enough abstraction level to reuse
for other targets. This CL moves the target-depending routines into a
new source file (ArchFactory.c) and what's left up a level into the
target-independent directory.
Change-Id: I792d5dc6b2dc8aa6aaa384039da464db2c766123
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Merge commit '7c1f9b34d49aa7cea9b830226e33e95d7608cf76' into dalvik-dev
* commit '7c1f9b34d49aa7cea9b830226e33e95d7608cf76':
GC Card marking fix for SPUT_OBJECT - use correct object head
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This CL changes the way we mark GC card to consistently use the object
head (previously, we marked somewhere in the object - often the head, but
not always). Also, previously a coding error caused us to skip the card
mark for OP_APUT_OBJECT_VOLATILES. Fixed here.
Change-Id: I53eb333b9bd0b770201af0dc617d9a8f38afa699
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Change-Id: I5319418678b5390b75267af9cc2c9fa6f35f3bdb
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Much of the register utility code is target independent. Move it up
a level so the x86 JIT can use it.
Change-Id: Id9895a42281fd836cb1a2c942e106de94df62a9a
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Change-Id: I21e35d4cdf2636ae3cd7facd45ad4f5c4ab82e7b
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Change-Id: I8b84a4f1e1690f5b62de7404ea6ede00317848bb
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Change-Id: I644b3cd50e3c63b209741c8b818b4c1435ee8218
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This CL changes the way we mark GC card to consistently use the object
head (previously, we marked somewhere in the object - often the head, but
not always). Also, previously a coding error caused us to skip the card
mark for OP_APUT_OBJECT_VOLATILES. Fixed here.
Change-Id: I133ef6395c51a0466c9708209b08e79c3083aff2
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The portable interpreter and fast interpreter use 32-bit accesses
for all sub-word scalars. The JIT generated code to tailor the access
to the data size. It doesn't matter which approach is taken, but all
interpreters & JIT must be consistent. Changing the JIT to use 32-bit
accesses for all sub-word instance scalars.
Fix for Issue 2973137
Change-Id: I8b1e9e6be075012c7c174728b77c7a76884975b7
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Change-Id: Ic94a916e777e9bc5163cf205899daf9c18dcafe1
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Mark some functions "static".
Change-Id: Ia80bccab1f72690729e43f99783d34fe366108b2
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This introduces the return-void-barrier instruction, which is identical
to return-void on UP systems, but provides an additional store/store
barrier on SMP. This is intended for use in constructors of objects
with final fields.
The assembler doesn't like "dmb st", and we don't have an
ANDROID_MEMBAR_STORE barrier defined, so this currently uses full
fences.
This just defines the new instruction. It's not actually used yet.
Also, removed some stale "unused" files from the x86 and x86-atom
directories.
Bug 2965743.
Change-Id: I072e372fd2d57f2617a8d4fff5fd4b38bdda75d1
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The portable interpreter and fast interpreter use 32-bit accesses
for all sub-word scalars. The JIT generated code to tailor the access
to the data size. It doesn't matter which approach is taken, but all
interpreters & JIT must be consistent. Changing the JIT to use 32-bit
accesses for all sub-word instance scalars.
Fix for Issue 2973137
Change-Id: I6108ccc98c1b43974373764913d5f8d0d8723cd4
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tag, add missing cases for JIT
Merge commit '8ef4d4f3d050b0130dbf723285990b045f04d5f3' into dalvik-dev
* commit '8ef4d4f3d050b0130dbf723285990b045f04d5f3':
Correct Volatile SGET/SPUT format tag, add missing cases for JIT
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Fix for http://b/issue?id=2971877, which was identified via
debug tracing on http://b/issue?id=2971569. There were a couple
of problems: first, the volatile sget/sput byte codes had the
wrong format tag (22c instead of 21c). Second, the JIT was missing
a couple of case statments to handle these. As far as the JIT goes,
this would not have caused correctness problems, but would have
been slower than necessary.
Change-Id: I57a41c4e063642b0c19acba5bb0855dd8ce2d4ba
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[cherry-picked e22bd84c8c8a57ddd86c21a1f65137d549b07935 from dalvik-dev to gingerbread]
Bug: 2935622
Change-Id: Ib4de19033dc4a08f41bf0eb0f7a21dcde216aae3
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