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* Remove Vdex::GetQuickenedInfoOf and all its users.Nicolas Geoffray2021-03-231-6/+2
| | | | | | Test: test.py Bug: 170086509 Change-Id: I1e1a4abf71245c0fd37f951c9af85f62feba18ca
* Add code size to CodeInfo.David Srbecky2021-03-051-6/+7
| | | | | | | | | This is in preparation of removing it from OatQuickMethodHeader. Bug: 123510633 Test: m test-art-host-gtest Test: ./art/test.py -b -r --host Change-Id: I5c5adb4c040e329b81c1393aa1b80ee017729c8a
* Add comment to art_jni_trampoline.Yabin Cui2021-01-281-0/+1
| | | | | | Bug: 175226454 Test: N/A Change-Id: Ia83c3afa69d7e1efb9685cfaa5401242712fa02a
* Revert^4 "Partial Load Store Elimination"Alex Light2021-01-251-1/+3
| | | | | | | | | | | | | | | | | This reverts commit 791df7a161ecfa28eb69862a4bc285282463b960. This unreverts commit fc1ce4e8be0d977e3d41699f5ec746d68f63c024. This unreverts commit b8686ce4c93eba7192ed7ef89e7ffd9f3aa6cd07. We incorrectly failed to include PredicatedInstanceFieldGet in a few conditions, including a DCHECK. This caused tests to fail under the read-barrier-table-lookup configuration. Reason for revert: Fixed 2 incorrect checks Bug: 67037140 Test: ./art/test/testrunner/run_build_test_target.py -j70 art-gtest-read-barrier-table-lookup Change-Id: I32b01b29fb32077fb5074e7c77a0226bd1fcaab4
* Revert "Revert^2 "Partial Load Store Elimination""Nicolas Geoffray2021-01-241-3/+1
| | | | | | | | | | This reverts commit fc1ce4e8be0d977e3d41699f5ec746d68f63c024. Bug: 67037140 Reason for revert: Fails read-barrier-table-lookup tests. Change-Id: I373867c728789bc14a4370b93a045481167d5f76
* Revert^2 "Partial Load Store Elimination"Alex Light2021-01-221-1/+3
| | | | | | | | | | | | | | | | | | This reverts commit 47ac53100303e7e864b7f6d65f17b23088ccf1d6. There was a bug in LSE where we would incorrectly record the shadow$_monitor_ field as not having a default initial value. This caused partial LSE to be unable to compile the Object.identityHashCode function, causing crashes. This issue was fixed in a parent CL. Also updated all Offsets in LSE_test to be outside of the object header regardless of configuration. Test: ./test.py --host Bug: 67037140 Reason for revert: Fixed issue with shadow$_monitor_ field and offsets Change-Id: I4fb2afff4d410da818db38ed833927dfc0f6be33
* Revert "Partial Load Store Elimination"Nicolas Geoffray2021-01-221-3/+1
| | | | | | | | | | This reverts commit b8686ce4c93eba7192ed7ef89e7ffd9f3aa6cd07. Bug: 67037140 Reason for revert: Fails a few tests. Change-Id: Icf0635bffbfbba93bf0a5b854a9582c418198136
* Partial Load Store EliminationAlex Light2021-01-211-1/+3
| | | | | | | | | | | | | | | | Add partial load-store elimination to the LSE pass. Partial LSE will move object allocations which only escape along certain execution paths closer to the escape point and allow more values to be eliminated. It does this by creating new predicated load and store instructions that are used when an object has only escaped some of the time. In cases where the object has not escaped a default value will be used. Test: ./test.py --host Test: ./test.py --target Bug: 67037140 Change-Id: Idde67eb59ec90de79747cde17b552eec05b58497
* Optimizing: Add debugging output for HInstruction.Vladimir Marko2021-01-061-1/+1
| | | | | | | | | | | | | | | | | | | | | Allow printing individual instruction and its arguments with the HGraphVisualizer. Arguments are dumped "recursively" (but implemented with a queue instead of actual recursion). For example, printing the Return instruction from the method Main.testLoop17 in 530-checker-lse yields v28 Return [i27] dex_pc:23 loop:none i27 Add [i24,i26] dex_pc:22 loop:none i24 Phi [i5,i15] dex_pc:n/a reg:0 is_catch_phi:false loop:none i5 IntConstant dex_pc:0 1 loop:none i15 IntConstant dex_pc:5 2 loop:none i26 InstanceFieldGet [l6] dex_pc:20 field_name:TestClass.i field_type:Int32 loop:none l6 NullCheck [l1] dex_pc:1 env:[[i5,_,_,l1,i2]] loop:none l1 ParameterValue dex_pc:n/a loop:none Test: Manual; modify LSE to print the instruction above. Change-Id: Iaf41ba62cd6a5a36236ad0abca082ebffcf6a20e
* Do not build intrinsic graph for signature polymorphic methods.Vladimir Marko2020-09-071-1/+7
| | | | | | | | | | | | | The InstructionBuilder cannot build HInvokePolymorphic for an intrinsic graph. It would be rather useless to allow this as signature polymorphic method intrinsics always need the slow-path for unhandled cases, and we would therefore reject the compiled code anyway. Instead, prevent the construction of the intrinsic graph for signature polymorphic methods. Test: testrunner.py --host --optimizing -t 712-varhandle-invocations Bug: 65872996 Change-Id: Id82f1f282383dbd45d6db2bd2a96d838b685d7ed
* Move code item to the data pointer and remove code_item_offset.Nicolas Geoffray2020-09-071-1/+1
| | | | | | | | | | | This saves 4 bytes on 32bit and 8 bytes on 64bit on ArtMethod. Also update nterp to directly fetch the code item from the data pointer. Test: test.py Bug: 112676029 Change-Id: Ic01f43c7ccf2cbce1ec517478e81362232d36371
* Improved LSE: Replacing loads with Phis.Vladimir Marko2020-08-211-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create "Phi placeholders" for tracking heap values that can merge from different values and try to match existing Phis or create new Phis to replace loads. For Phi placeholders from loop headers we do not know whether they are fed by unknown values through back-edges when processing the loop header, so we delay processing loads that depend on them until we walked the entire graph. We then try to match them with existing instructions (when the location is unchanged in the loop) or Phis or create new Phis if needed. If we find a loop Phi placeholder fed with unknown value from a back-edge, we mark the Phi placeholder unreplaceable and reprocess loads and stores to propagate the unknown value. This can sometimes allow other loads to be replaced. At the end we re-calculate the heap values to find stores that can be eliminated because they write over the same value. Golem results: art-opt-cc arm arm64 x86 x86-64 CaffeineFloat +6.7% +3.0% +5.9% +3.8% KotlinMicroWhen +33.7% +4.8% +1.8% +0.6% art-opt (more noisy than art-opt-cc) CaffeineFloat +4.1% +4.4% +7.8% +10.5% KotlinMicroWhen +33.6% +2.0% +1.8% +1.8% The MoveLiteralColumn benchmark seems to gain significantly (up to 22% on art-opt-cc but under 10% on art-opt) but it is very noisy and the results are therefore unreliable. Insignificant code size changes for aosp_blueline-userdebug: - before: arm boot*.oat: 15303468 arm64 boot*.oat: 18184736 services.odex: 25195944 grep -c pAllocObject boot.arm64.oatdump.txt: 27213 grep -c pAllocArray boot.arm64.oatdump.txt: 3620 - after: arm boot*.oat: 15299524 (-4KiB, -0.03%) arm64 boot*.oat: 18176528 (-8KiB, -0.05%) services.odex: 25191832 (-4KiB, -0.02%) grep -c pAllocObject boot.arm64.oatdump.txt: 27206 (-7) grep -c pAllocArray boot.arm64.oatdump.txt: 3615 (-5) Test: New tests in 530-checker-lse. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Test: blueline-userdebug boots. Bug: 77906240 Change-Id: Ia9fe0cd3530f9d3941650dfefc00a7f7fd821994
* ARM: Allow FP args in core regs for @CriticalNative.Vladimir Marko2020-08-101-0/+14
| | | | | | | | | | | | | | | | | | | | | If a float or double argument needs to be passed in core register to a @CriticalNative method due to soft-float native ABI, insert a fake call to Float.floatToRawIntBits() or Double.doubleToRawLongBits() to satisfy type checks in the compiler. We cannot do that for intrinsics that expect those inputs in actual FP registers, so we still prevent such intrinsics from using `kCallCriticalNative`. This should be irrelevant if an actual intrinsic implementation is emitted. There are currently two unimplemented intrinsics that are affected by the carve-out, namely MathRoundDouble and FP16ToHalf, and four intrinsics implemented only when ARMv8A is supported, namely MathRint, MathRoundFloat, MathCeil and MathFloor. Test: testrunner.py --target --32 -t 178-app-image-native-method Bug: 112189621 Change-Id: Id14ef4f49f8a0e6489f97dc9588c0e6a5c122632
* Dump ISA into .cfgEvgeny Astigeevich2020-07-281-1/+4
| | | | | | | | | | | | | | | | | | | | The optimizing compiler dumps ISA features into .cfg which can be used by the checker. A new tool perf2cfg needs to know ISA a CFG corresponds to. The tool uses this to check that input perf data has the same ISA. This CL implements in the compiler dumping ISA in addition to ISA features: begin_compilation name "isa:some_isa isa_features:feature1,-feature2" method "isa:some_isa isa_features:feature1,-feature2" date 1580721972 end_compilation Bug: 147876827 Test: ./art/tools/checker/run_unit_tests.py Test: test.py --target --optimizing --jit --interpreter Test: test.py --host --optimizing --jit --interpreter Change-Id: I189eae0f4de61e6a49c01d925e7136b5f7027c91
* Dump instruction set features in .cfgFabio Rinaldi2020-07-221-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds a compilation block at the beginning of the .cfg dumped by the optimizing compiler when --dump-cfg is enabled. The compilation block appears in the following form: begin_compilation name "isa_features:feature1,-feature2" method "isa_features:feature1,-feature2" date 1580721972 end_compilation This compilation block dump is passed to checker script (see https://android-review.googlesource.com/c/platform/art/+/1290997) for checking if a certain instruction set feature was used at compile time. Author: Fabio Rinaldi Committer: Artem Serov Bug: 147876827 Test: ./art/tools/checker/run_unit_tests.py Test: test.py --target --optimizing Change-Id: If4309af4bab892f715aad1d3bd338f8ee11e497c
* Introduce an enum for the compilation kind.Nicolas Geoffray2020-06-181-18/+18
| | | | | Test: test.py Change-Id: I5329e50a6b4521933b6b171c8c0fbc618c3f67cd
* ART: Simplify HRem to reuse existing HDivEvgeny Astigeevich2020-06-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | A pattern seen in libcore and SPECjvm2008 workloads is a pair of HRem/HDiv having the same dividend and divisor. The code generator processes them separately and generates duplicated instructions calculating HDiv. This CL adds detection of such a pattern to the instruction simplifier. This optimization affects HInductionVarAnalysis and HLoopOptimization preventing some loop optimizations. To avoid this the instruction simplifier has the loop_friendly mode which means not to optimize HRems if they are in a loop. A microbenchmark run on Pixel 3 shows the following improvements: | little cores | big cores arm32 Int32 | +21% | +40% arm32 Int64 | +46% | +44% arm64 Int32 | +27% | +14% arm64 Int64 | +33% | +27% Test: 411-checker-instruct-simplifier-hrem Test: test.py --host --optimizing --jit --gtest --interpreter Test: test.py --target --optimizing --jit --interpreter Test: run-gtests.sh Change-Id: I376a1bd299d7fe10acad46771236edd5f85dfe56
* ART: Introduce predicated vector instructions.Artem Serov2020-06-091-1/+3
| | | | | | | | | This CL introduces a minimal changes to the IR to support autovectorization with use of predicated execution of SIMD instructions (e.g. Arm SVE). Test: test-art-target, test-art-host. Change-Id: Ibb7c5520fec6b858fb29f0dde19ec65501831a3a
* Run LSA as a part of the LSE pass.Vladimir Marko2020-06-081-1/+0
| | | | | | | | | | Make LSA a helper class, not an optimization pass. Move all its allocations to ScopedArenaAllocator to reduce the peak memory usage a little bit. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Change-Id: I7fc634abe732d22c99005921ffecac5207bcf05f
* Add compiler type to CompilerOptions.Vladimir Marko2020-05-201-8/+5
| | | | | | | | | | Let CompilerOptions hold the information whether it is AOT or JIT compilation, or Zygote JIT for shared code. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing --jit Test: aosp_taimen-userdebug boots. Change-Id: Id9200572406f8e43d99b8b61ef0e3edf43b52fff
* Move HandleCache to HGraph.Vladimir Marko2020-05-131-34/+16
| | | | | | | | | | | | | This avoids passing the `VariableSizedHandleScope*` argument around and eliminates HGraph::inexact_object_rti_ and its initialization. The latter shall allow running Optimizing gtests that do not require type information without creating a Runtime in future. (To be implemented in a separate CL.) Test: m test-art-host-gtest Test: testrunner.py --host --optmizing Test: aosp_taimen-userdebug boots. Change-Id: I36fe9bc556c6d610d644c8c14cc74c9985a14d64
* Move implementations from class_root.h to -inl.h .Vladimir Marko2020-05-131-1/+0
| | | | | | | | | | Make it possible to include the definition of enum ClassRoot without pulling in a lot of other headers. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Test: aosp_taimen-userdebug boots. Change-Id: Ic90fdd70bfe0c5428a5c9a0d7901ea7e15b03488
* Add explicit compiler option to enable test-specific features.David Srbecky2020-04-011-1/+1
| | | | | | | | | | | We can no longer rely on checking the "core.art" image name, since we plan to remove it and use the shipped boot image. This option enables test-specific features, such as $noinline$. Test: ./art/test.py -r --optimizing --64 Bug: 147817558 Change-Id: Iadac6e1b0f46e83efd0551fb8462a6b268ad33d8
* Add more logging and sanity checks for JIT mini-debug-info.David Srbecky2020-03-251-10/+12
| | | | | | | | Used when diagnosing b/151137723. Keep it around. Bug: 151137723 Test: test.py -r --jit Change-Id: I10cc613c7396607e221fdc1f5972d26c1ac03fa8
* Refactor RemoveNativeDebugInfoForJit.David Srbecky2020-03-121-4/+0
| | | | | | | | | | | | | | | | | | | | This is partial revert of CL/1099280 (Remove global maps). It somewhat resurrects the lazy method removal. The original goal was to only remove methods from the GC, and do all of them in bulk for simplicity and efficiency. However, this is proving infeasible since we have several corner cases which remove methods outside the GC code path. The behaviour for the GC code path is preserved by this CL. Instead of passing method array, the methods are individually marked for removal and then repacking is immediately forced. The only difference is that coroner cases are done lazily. Test: ./art/test.py -b -r --host --jit --64 Change-Id: I42729545d6b51df788d92f9cf149a6e065b90c68
* Remove JIT native debug info on failed commits.David Srbecky2020-02-221-0/+4
| | | | | | | | This could happen if single-implementation assumptions are invalid, and would result in temporary double entries in JIT debug info. Test: ./art/test.py -b -r --host --gcstress --jit --32 -t 068 Change-Id: I765c9310b6cc4fa440e4121780f8b9053388bd3d
* Remove MIPS support from Optimizing.Vladimir Marko2020-02-131-45/+0
| | | | | | | | Test: aosp_taimen-userdebug boots. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Bug: 147346243 Change-Id: I97fdc15e568ae3fe390efb1da690343025f84944
* Only flush visualizer output at the end of the compilation.Nicolas Geoffray2020-02-041-6/+6
| | | | | | | | Otherwise multiple threads compiling will mix their output. Test: run-tests Bug: 147094528 Change-Id: I905c8874cbe2c02c2d79577024d4606a3784b67a
* JIT baseline: trigger optimized compilation on hotness threshold.Nicolas Geoffray2019-12-031-2/+4
| | | | | | | | | | | | | - Add a new hotness count in the ProfilingInfo to not conflict with interpreter hotness which may use it for OSR. - Add a baseline flag in the OatQuickMethodHeader to identify baseline compiled methods. - Add a -Xusetieredjit flag to experiment and test. Bug: 119800099 Test: test.py with Xusetieredjit to true Change-Id: I8512853f869f1312e3edc60bf64413dee9143c52
* Honor the --baseline flag for the JIT.Nicolas Geoffray2019-11-261-1/+1
| | | | | Test: art -Xcompiler-option --baseline uses the baseline compiler. Change-Id: I2a5a3ed0038ca965ab1f0cebffb7900e90bae43a
* Revert "Make compiler/optimizing/ symbols hidden."Vladimir Marko2019-10-141-1/+1
| | | | | | | | | This reverts commit e2727154f25e0db9a5bb92af494d8e47b181dfcf. Reason for revert: Breaks ASAN tests (ODR violation). Bug: 142365358 Change-Id: I38103d74a1297256c81d90872b6902ff1e9ef7a4
* Make compiler/optimizing/ symbols hidden.Vladimir Marko2019-10-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | Make symbols in compiler/optimizing hidden by a namespace attribute. The unit intrinsic_objects.{h,cc} is excluded as it is needed by dex2oat. As the symbols are no longer exported, gtests are now linked with the static version of the libartd-compiler library. libart-compiler.so size: - before: arm: 2396152 arm64: 3345280 - after: arm: 2016176 (-371KiB, -15.9%) arm64: 2874480 (-460KiB, -14.1%) Test: m test-art-host-gtest Test: testrunner.py --host --optimizing --jit Bug: 142365358 Change-Id: I1fb04a33351f53f00b389a1642e81a68e40912a8
* Revert^2 "JIT: Separate code allocation and initialization."David Srbecky2019-10-101-57/+62
| | | | | | | | This reverts commit 63b0c26aae3e7237166dd781eb7a15fbc7c091c2. Test: ./art/test.py -b -r --host --all-gc -t 708 Reason for revert: Reland after bug fix. Change-Id: Ic13e2799bf4bdd8ca468f72cc0f3b72f224f2b08
* Revert "JIT: Separate code allocation and initialization."Nicolas Geoffray2019-10-091-62/+57
| | | | | | | | | This reverts commit e1b36f09cb478a39ba443f6acb11cd1901c01c1d. Reason for revert: Crashes in art::jit::JitMemoryRegion::FreeCode https://logs.chromium.org/logs/art/buildbucket/cr-buildbucket.appspot.com/8900060997388741808/+/steps/test_libcore/0/stdout Change-Id: I40259baec9acbb7889732548f8b31e0a48651cd9
* JIT: Separate code allocation and initialization.David Srbecky2019-10-091-57/+62
| | | | | | | | | | | Allocate(reserve) both code and data first, and then initialise(commit) both of them. This is useful since we know the address sooner for the purpose of debug info generation. Test: ./art/test.py -b -r --jit --host --64 Change-Id: I4971a8801004efbc6c2b27884834dda775b72664
* JIT mini-debug-info: Generate the debug info sooner.David Srbecky2019-10-081-57/+53
| | | | | | | | We need to add the debug info before the entry-point is set, otherwise there is window of time when we are missing it. Test: test.py -b -r --optimizing --jit --host --64 Change-Id: I3bbad0c96d68e9603bac131faee498b8b9f62699
* Fix JIT data dual mapping for apps.David Srbecky2019-09-011-10/+4
| | | | | | | | | | We don't use it now, but it would be nice to make it functional. Mark the read-only memory as const, and fix the compile errors. Test: test.py -b --host --jit Bug: 119800099 Change-Id: Ic1c45072f3c97f560e843f95fb87b95f754c6e03
* JIT mini-debug-info: Allocate entries in the JIT data space.David Srbecky2019-08-221-0/+1
| | | | | | | Test: test.py -b --host --jit Test: device boots Bug: 119800099 Change-Id: I7efa1e6e6660239cbd6438b829e08dd9cd079343
* JIT mini-debug-info: Remove global maps.David Srbecky2019-08-161-11/+7
| | | | | | | | | | Keep the extra bookkeeping information in JITCodeEntry. Also do the compression eagerly during GC rather then lazily. Test: test.py -b --host --jit Bug: 119800099 Change-Id: Ie6cc682033a32c01d4c2cac242d8a4201116f940
* Don't compile OSR methods that have phi equivalents at loop entry.Nicolas Geoffray2019-08-071-0/+5
| | | | | | | | | We currently don't handle this in the stack map, where we only encode one stack slot for a dex register. Bug: 136698025 Test: 721-osr Change-Id: Ib395ed1165387ad5446a463c307cc0a45e365885
* Revert "Revert "Make the JIT zygote memory shared.""Nicolas Geoffray2019-06-281-1/+6
| | | | | | | | | | | This reverts commit 2fef66b294417d447630f9d98de68227eef476d3. Bug: 119800099 Bug: 136110523 Reason for revert: Fixed webview_zygote case. Change-Id: Iaae8c999463d77b7b1e62b55458493bdbc97a104
* Revert "Make the JIT zygote memory shared."Nicolas Geoffray2019-06-261-6/+1
| | | | | | | | | | | This reverts commit 05f87217ddc9b4b9186710c0135b918f456c5aef. Bug: 119800099 Bug: 136110523 Reason for revert: testWebview flaking Change-Id: I96afa6bc9c56c4aaf5ed72ae370f6f69c096c559
* Make the JIT zygote memory shared.Nicolas Geoffray2019-06-261-1/+6
| | | | | | Test: boots Bug: 119800099 Change-Id: I75ff8a58eea4de5cb833139641b4e15b8394d9b1
* Move code writing to data portion of the JIT cache in JitMemoryRegion.Nicolas Geoffray2019-06-241-34/+24
| | | | | | | | So there is only one method that needs to write to the data portion of the region. Test: test.py --jit Change-Id: I5b7dc442526da54f83a208cb70c8cf86fad6ebcd
* Pass the memory region to allocate into to the compiler / allocation.Nicolas Geoffray2019-06-101-1/+8
| | | | | | Test: test.py Bug: 119800099 Change-Id: Ie3cba5abe3dd4f8756af5ecfd6c26320de314fe8
* Fix DWARF line-number generation for JITed methods.David Srbecky2019-04-291-1/+1
| | | | | | | | | | | | | Don't strip, repack or compress debug-info if explicitly requested by the developer (using the -g compiler flag). If enabled, the DWARF debug info has about 1:1 size overhead relative to JIT code + data. Bug: 131422204 Test: Check that gdb shows line numbers for JITed method. Test: Hard-code always-enable generation and run maps. Change-Id: If06de8ae2317af4d57d84e8a8bfae86a597dd4e4
* Use generic name for JNI trampolines.David Srbecky2019-03-271-1/+1
| | | | | | | | JNI trampolines tend to be deduplicated which seems to lead to confusion. Bug: 32949969 Test: test.py -b --host -r -t 137-cfi Change-Id: Ic39998448a05f98fc1e068c4f384f35085121911
* optimizing_compiler: Avoid extra std::string copyGreg Kaiser2019-03-261-1/+1
| | | | | | | | | The function OptimizationPassByName() takes a const std::string reference, so it's inefficient to pass it the result of std::string::c_str(). Test: TreeHugger Change-Id: I84fc717285b0278264cba3c9504290876025a01d
* Revert "Revert^2 "Add code size to CodeInfo""Nicolas Geoffray2019-03-061-7/+6
| | | | | | | | | | | This reverts commit e1412dacbf1d2a809bd1fca658cc8cb8f61f8ee6. Bug: 123510633 Bug: 127305289 Reason for revert: b/127305289 Change-Id: I54557b05a44777f1fa2c15bde4fa648980f42eed
* ART: Reduce dependencies on CompilerDriver.Vladimir Marko2019-02-201-51/+38
| | | | | | | | | Preparation for moving CompilerDriver and other stuff from libart-compiler.so to dex2oat. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Change-Id: Ic221ebca4b8c79dd1549316921ace655f2e3f0fe