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* Link libvixl statically.Vladimir Marko2021-05-101-8/+28
| | | | | | | | | | | | | | | | | | | | | | | | | Instead of including shared library libvixl.so in the ART Module, link libvixl statically to all binaries that use it, namely libart-compiler.so and libart-disassembler.so which shall increase in size with the additional libvixl code. The ART Module size with default libvixl symbol visibility: - before: 88460730B - after: 86973943B (-1.42MiB) With hidden libvixl symbol visibility: - before: 88337851B - after: 84962808B (-3.22MiB) (This is with master-art where we do not have a boot profile and therefore compile more code in boot image.) The change from default to hidden visibility is done in https://android-review.googlesource.com/1697237 . Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Test: run-gtests.sh Test: testrunner.py --target --optimizing Bug: 186902856 Change-Id: I040b0115b94b8690ee7be53e3ded8610d9f13e99
* Add min_sdk_version for ART module.Nicolas Geoffray2021-03-191-0/+1
| | | | | | Bug: 180399951 Test: m Change-Id: I5e2a1ddc3063be26c602bf4db8e6b77f2d54b656
* [LSC] Add LOCAL_LICENSE_KINDS to artBob Badour2021-03-021-0/+9
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test/631-checker-get-class/Android.bp test/632-checker-char-at-bounds/Android.bp test/635-checker-arm64-volatile-load-cc/Android.bp test/636-arm64-veneer-pool/Android.bp test/637-checker-throw-inline/Android.bp test/638-checker-inline-cache-intrinsic/Android.bp test/639-checker-code-sinking/Android.bp test/640-checker-boolean-simd/Android.bp test/640-checker-integer-valueof/Android.bp test/640-checker-simd/Android.bp test/641-checker-arraycopy/Android.bp test/641-iterations/Android.bp test/642-fp-callees/Android.bp test/643-checker-bogus-ic/Android.bp test/645-checker-abs-simd/Android.bp test/646-checker-arraycopy-large-cst-pos/Android.bp test/646-checker-long-const-to-int/Android.bp test/646-checker-simd-hadd/Android.bp test/647-jni-get-field-id/Android.bp test/650-checker-inline-access-thunks/Android.bp test/652-deopt-intrinsic/Android.bp test/654-checker-periodic/Android.bp test/655-checker-simd-arm-opt/Android.bp test/655-jit-clinit/Android.bp test/656-checker-simd-opt/Android.bp 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test/989-method-trace-throw/Android.bp test/990-field-trace/Android.bp test/991-field-trace-2/Android.bp test/992-source-data/Android.bp test/993-breakpoints/Android.bp test/994-breakpoint-line/Android.bp test/995-breakpoints-throw/Android.bp test/996-breakpoint-obsolete/Android.bp test/997-single-step/Android.bp test/Android.bp tools/Android.bp tools/ahat/Android.bp tools/ahat/Android.mk tools/art_verifier/Android.bp tools/cpp-define-generator/Android.bp tools/dexanalyze/Android.bp tools/dexfuzz/Android.bp tools/dmtracedump/Android.bp tools/hiddenapi/Android.bp tools/jfuzz/Android.bp tools/jvmti-agents/breakpoint-logger/Android.bp tools/jvmti-agents/chain-agents/Android.bp tools/jvmti-agents/dump-jvmti-state/Android.bp tools/jvmti-agents/enable-vlog/Android.bp tools/jvmti-agents/field-counts/Android.bp tools/jvmti-agents/field-null-percent/Android.bp tools/jvmti-agents/jit-load/Android.bp tools/jvmti-agents/list-extensions/Android.bp tools/jvmti-agents/simple-force-redefine/Android.bp tools/jvmti-agents/simple-profile/Android.bp tools/jvmti-agents/ti-alloc-sample/Android.bp tools/jvmti-agents/ti-fast/Android.bp tools/jvmti-agents/titrace/Android.bp tools/jvmti-agents/wrapagentproperties/Android.bp tools/signal_dumper/Android.bp tools/tracefast-plugin/Android.bp tools/veridex/Android.bp Added SPDX-license-identifier-Apache-2.0 SPDX-license-identifier-BSD to: sigchainlib/Android.bp Added SPDX-license-identifier-Apache-2.0 SPDX-license-identifier-BSD SPDX-license-identifier-GPL-2.0 to: Android.bp Android.mk Added SPDX-license-identifier-Apache-2.0 SPDX-license-identifier-GPL-2.0 SPDX-license-identifier-GPL-with-classpath-exception to: dt_fd_forward/Android.bp openjdkjvmti/Android.bp Added SPDX-license-identifier-GPL-2.0 SPDX-license-identifier-GPL-with-classpath-exception to: openjdkjvm/Android.bp Bug: 68860345 Bug: 151177513 Bug: 151953481 Test: m all Exempt-From-Owner-Approval: janitorial work Change-Id: If775045c12955fa6d72d40ccf2a09beef93d1699 Merged-in: If775045c12955fa6d72d40ccf2a09beef93d1699
* Rename ART release APEX to com.android.art.Martin Stjernholm2020-10-231-3/+3
| | | | | | | | | | | | | | | | Test: Build & boot on AOSP master Test: `m` on AOSP master, flipping PRODUCT_ART_TARGET_INCLUDE_DEBUG_BUILD between true and false, and check out/target/product/bonito/symbols/apex/com.android.art. Test: art/build/apex/runtests.sh Test: art/tools/buildbot-build.sh {--host,--target} Test: art/tools/run-gtests.sh Test: m test-art-host-gtest Test: art/test/testrunner/testrunner.py --target --64 --optimizing Test: m build-art-target-golem Bug: 169639321 Change-Id: Ic4bb8d6f9988ce99bba326b9c635bd3c01ed74ab Merged-In: Ic4bb8d6f9988ce99bba326b9c635bd3c01ed74ab
* Link libart-disassembler statically into static libart-compiler.Martin Stjernholm2020-09-291-0/+16
| | | | | | | | | | | | Necessary to avoid runtime dlopen of non-existing libart(d)-disassembler.so in host dex2oat. This increases the stripped dex2oat binary size by 4.8% or ~800 KB. Test: art/tools/buildbot-build.sh --host && \ art/test/testrunner/testrunner.py --optimizing --host --ndebug -t 465 with and without HOST_PREFER_32_BIT=true Bug: 145934348 Change-Id: I623019132175bd0430d30a421655484bdcb71857
* Improve disasembly of BL to thread entrypoint trampoline.Vladimir Marko2020-09-033-4/+47
| | | | | | Test: Manual, search for "\bbl\b" in `m dump-oat` output and oatdump of an individual oat file for arm and arm64. Change-Id: Idb6d8d1a21b2aa8c77e5b72f24faf7a4e655294c
* Set apex_available propertyJiyong Park2020-05-041-0/+10
| | | | | | | | | | | | | The marked library(ies) were available to the APEXes via the hand-written whitelist in build/soong/apex/apex.go. Trying to remove the whitelist by adding apex_available property to the Android.bp of the libraries. Bug: 150999716 Test: m Merged-In: Ie9a693be10c6c6571c8aa5357500f5d931400593 (cherry picked from commit 0f152391c0458d3d1cce04a11bc92e7234955d6f) Change-Id: Ie9a693be10c6c6571c8aa5357500f5d931400593
* Remove MIPS support from JNI/trampoline compiler.Vladimir Marko2020-02-134-921/+0
| | | | | | | | | | Also remove MIPS assembler/disassembler support. Test: aosp_taimen-userdebug boots. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Bug: 147346243 Change-Id: Id736074b97cd04987a7902741828b119508df1c0
* Revert submission 1194828-revert-1191937-art_apex_available-DWXQGTKMARJiyong Park2019-12-201-0/+4
| | | | | | | | | | | | | | | | | | | Reason for revert: relanding with fix Reverted Changes: Ic4119368c:Revert submission 1191937-art_apex_available Ia084976bb:Revert submission 1191937-art_apex_available Iada86226d:Revert submission 1191937-art_apex_available Ic76735eac:Revert submission 1191937-art_apex_available I1eb30e355:Revert submission 1191937-art_apex_available Icaf95d260:Revert submission 1191937-art_apex_available Ie8bace4be:Revert submission 1191937-art_apex_available I8961702cf:Revert submission 1191937-art_apex_available I39316f9ef:Revert submission 1191937-art_apex_available I522a7e83b:Revert submission 1191937-art_apex_available I8b9424976:Revert submission 1191937-art_apex_available I48b998629:Revert submission 1191937-art_apex_available Change-Id: I7a101d39ff63c153675e4e741f9de1a15a778d33
* Revert submission 1191937-art_apex_availableJoseph Murphy2019-12-191-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Original Commit Message: """ Rename modules that are APEX-only The renamed modules are only available for APEXes, but not for the platform. Use the <module_name>.<apex_name> syntax to correctly install the APEX variant of the modules. """ Reason for revert: Build Cop - Breaks about 15 AOSP targets, with high confidence due to these changes being the only non-robot changes in those builds. Reverted Changes: I190ce2d10:Use apex_available property I990e0a67e:Use apex_available property I0d1295683:Revert "Avoid duplicated classes for boot dex jars... I5fb725403:Find the jar libraries in APEX from the correct pa... I322b1efcc:Rename modules that are APEX-only Ifa2bd0f8f:Use apex_available property Iac6533177:Use apex_available property Ie999602c6:Use apex_available property I2a3d73397:Use apex_available property Ic91bcbb9a:Use apex_available property Ia6c324eed:Use apex_available property I964d0125c:Use apex_available property Change-Id: I1eb30e355cfce316b94cde0dd176002af8d222bb
* Use apex_available propertyJiyong Park2019-12-191-0/+4
| | | | | | | | | | | | | | | Use apex_available property to prevent modules that are only for the ART apex from being used outside of the APEX. This change also fixes the reference to $(TARGET_OUT_SHARED_LIBRARIES)/$(lib).so to $(lib).com.android.art.debug phony module since the former is never installed to the system partition due to their 'apex_available' settings. Bug: 128708192 Bug: 133140750 Test: m Change-Id: I990e0a67e066d9b1dc221748422a2f44449258da
* Conditionally include MIPS32/MIPS64 and x86/x86-64 disassembler definitions.Roland Levillain2019-08-071-24/+12
| | | | | | | | | | | | | | | | | Only include these disassemblers if at least one of the corresponding back ends is enabled. Impact on the size of libart(d)-disassembler.so: - ARM-only target: - libart-disassembler.so: 66512 bytes → 33840 bytes (-32672 bytes, -49%) - libartd-disassembler.so: 70680 bytes → 33900 bytes (-36780 bytes, -52%) - ARM64-only target: - libart-disassembler.so: 105168 bytes → 55776 bytes (-49392 bytes, -47%) - libartd-disassembler.so: 113416 bytes → 59936 bytes (-53480 bytes, -47%) Test: m test-art-host Bug: 119090273 Change-Id: I2bccb482df46b5ce1ca69ffb110451d79a64b996
* Cleanup some usages of include_dirsPaul Duffin2019-07-191-2/+9
| | | | | | | | | | | | | | | | | | | | | The include_dirs property causes problems when unbundling as they can directly reference directories inside the runtime module repositories which will break the unbundled build as those repositories will not be present. While these usages do not cause problems as they are references within the runtime module repository they need removing so that the build can enforce no usage of runtime module repository paths in the include_dirs property. This change: * Replaces include_dirs with local_include_dirs where possible. * Uses libnativehelper provided header libs, this is possible as they have been updated to build against the NDK. * Adds headers for disassembler, libdexfile * Makes libart_runtime_headers build against NDK. Test: m checkbuild Bug: 134379140 Change-Id: Iaf065caf4b6a2fcf252f6d5da8fff5be97a242ea
* ART: Run bpfmt over ART's blueprint filesAndreas Gampe2019-05-171-2/+2
| | | | | Test: mmma art Change-Id: Ic85df4770c12ec02836c877b243d4aec234aaada
* Patch supports Intel(R) AVX/AVX2 MOV Instructionjaishank2019-04-251-2/+19
| | | | | | | | | | | | This patch enhances the existing ART-Compiler to generate Intel(R) AVX/AVX2 MOV Instructions for doing SIMD Operations on Intel(R) Architecture CPUs. It also provides the framework for AVX/AVX2 Instruction encoding and dissassembly BUG: 127881558 Test: run-test gtest Change-Id: I9386aecc134941a2d907f9ec6b2d5522ec5ff8b5
* C++17 compatibility: make WITH_TIDY=1 happy again.Elliott Hughes2018-11-291-1/+1
| | | | | | Bug: http://b/111067277 Test: builds Change-Id: I8b69ea3815e14bb6eb27f40c0dd01a85b340a355
* Use unified libvixl(d) instead of per-supported-arch libvixl(d)-arm(64).Roland Levillain2018-11-061-4/+2
| | | | | | | | | | Using a unified libvixl(s) saves space by sharing code that was common to libvixl(d)-arm and libvixl(d)-arm64 and also addresses multiple definitions issues that would cause ODR violations. Test: 32-bit-only device boot test Test: 32/64-bit device boot test Change-Id: I1d67c43897e08bc0f5743eb038fe574ce2fb54f3
* Conditionally compile/link ARM & ARM64 disassemblers based on targeted archs.Roland Levillain2018-11-061-2/+30
| | | | | | | | | | | | | Note: We still unconditionally compile and link the MIPS32/MIPS64 and x86/x86-64 disassemblers, as they cannot be easily made orthogonal in the Blueprint file. Test: Build ART on host Test: Build ART for ARM-only device Test: Build ART for ARM64-only device Test: Build ART for ARM64/ARM device Bug: 119090273 Change-Id: Iec7bfed660ad0008bb870bfa614a90113bf4c501
* Conditionally include ARM disassemblers based on targeted archs.Roland Levillain2018-11-061-19/+44
| | | | | | | | | Test: Build ART on host Test: Build ART for ARM-only device Test: Build ART for ARM64-only device Test: Build ART for ARM64/ARM device Bug: 119090273 Change-Id: Iccf5cdea4199fc78448383aa7cd93aa049d5818d
* ART: Refactor for bugprone-argument-commentAndreas Gampe2018-10-091-2/+2
| | | | | | | | Handles smaller subdirectories. Bug: 116054210 Test: WITH_TIDY=1 mmma art Change-Id: I81c8f3396b9922684b68e9f3d8fccefe364f1279
* Revert^2 "ART: Refactor typedef to using"Andreas Gampe2018-09-201-6/+6
| | | | | | | | | | | This reverts commit ee07743e03042c2ca36e0c9513847a9e7d2509f1. Reason for revert: fixed attributes. Bug: 32619234 Test: m test-art-host Test: m test-art-target-gtest-unstarted_runtime_test Change-Id: I6f0a775adfdf6ecd132b470f7c5446e949872e20
* Revert "ART: Refactor typedef to using"Andreas Gampe2018-09-201-6/+6
| | | | | | | | | This reverts commit 9a20ff06f7ccee08a742c315ec6d351ab56ba1cd. Reason for revert: Attributes on the wrong side. Bug: 32619234 Change-Id: I8fd2abef619b22c02ccfbf5ae629339f1a60918b
* ART: Refactor typedef to usingAndreas Gampe2018-09-191-6/+6
| | | | | | | | Add clang-tidy's modernize-use-using. Bug: 32619234 Test: WITH_TIDY=1 mmma art Change-Id: If50d37b5152af4270784e3cde7951292a9e19033
* Use 'final' and 'override' specifiers directly in ART.Roland Levillain2018-08-285-23/+23
| | | | | | | | | | | | | | | Remove all uses of macros 'FINAL' and 'OVERRIDE' and replace them with 'final' and 'override' specifiers. Remove all definitions of these macros as well, which were located in these files: - libartbase/base/macros.h - test/913-heaps/heaps.cc - test/ti-agent/ti_macros.h ART is now using C++14; the 'final' and 'override' specifiers have been introduced in C++11. Test: mmma art Change-Id: I256c7758155a71a2940ef2574925a44076feeebf
* Disassemble saturation arithmetic x86/x86_64.Aart Bik2018-03-121-0/+16
| | | | | | | | | Rationale: Saturation arithmetic? It is coming! Bug: b/74026074 Test: visual inspection Change-Id: I056a2f785b01f9d56749a9fca611846f871e253c
* MIPS: Use PCNT to implement VisitIntegerBitCount() and VisitLongBitCount()Lena Djokic2018-03-071-0/+1
| | | | | | Test: ./testrunner.py --target --optimizing in QEMU Test: mma test-art-host-gtest Change-Id: I6ce5bdc86f951094f656c2f81ae8fc836d7a0b5c
* Header library to remove dependence on runtime/David Sehr2018-02-281-0/+3
| | | | | | | | | | | | Add a new header library to remove libdexfile and others' dependence on runtime (typically runtime/base) includes in libdexfile. Also a small step to tease dexlayout and profman away from relying on these as well. Bug: 22322814 Test: make -j 50 checkbuild make -j 50 test-art-host-gtest Change-Id: I38e2fe399a75f4bc6318c77a71954c00ea73ec2b
* Merge "ARM: Fix breaking changes from recent VIXL update."Roland Levillain2018-01-081-6/+20
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| * ARM: Fix breaking changes from recent VIXL update.Artem Serov2017-12-181-6/+20
| | | | | | | | | | | | Test: test-art-target, test-art-host Change-Id: I31de1e2075226542b9919f6ca054fd5bf237e690
* | MIPS: InstructionCodeGeneratorMIPS*::DivRemByPowerOfTwo()Lena Djokic2018-01-031-0/+5
|/ | | | | | Replace [d]sll+[d]srl with [d]ins on R2+. Change-Id: I7587e46c47c8ce413d81a5c6c29d91e32a14d855
* MIPS: Add asub_s/u.dfLena Djokic2017-11-081-0/+2
| | | | | | | | These instructions are needed for implementing Sum-of-Abs-Differences visitor. Test: mma test-art-host-gtest Change-Id: Ie708f30a450b0558215f59f21bb49b68c852f247
* ART: Make InstructionSet an enum class and add kLast.Vladimir Marko2017-11-021-6/+6
| | | | | | | | | | | | | | Adding InstructionSet::kLast shall make it easier to encode the InstructionSet in fewer bits using BitField<>. However, introducing `kLast` into the `art` namespace is not a good idea, so we change the InstructionSet to an enum class. This also uncovered a case of InstructionSet::kNone being erroneously used instead of vixl32::Condition::None(), so it's good to remove `kNone` from the `art` namespace. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Change-Id: I6fa6168dfba4ed6da86d021a69c80224f09997a6
* MIPS: Introduce a few MSA instructionsLena Djokic2017-10-191-0/+33
| | | | | | | | | These instructions are needed for SIMD reduction. Also added assembler tests for each instruction. Test: mma test-art-host-gtest Change-Id: I0f02618a14b4cbcc3b81ce51dd2586fa4cdbfd18
* Simplify Android.bp filesDan Willemsen2017-09-271-1/+0
| | | | | | | | | | | | | Remove clang: true, it's the default. Remove target.android.shared_libs "libdl", since it's already part of the system_shared_libs list. Remove host_ldlibs, since -ldl and -lpthread are automatically added on Darwin and Linux. -lrt is automatically added on Linux. Test: mmma art Change-Id: I18aa6aa5b49cad31caf6820b1974057ad14a2798
* Merge "MIPS: Eliminate hard-coded offsets in branches"Treehugger Robot2017-08-171-9/+19
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| * MIPS: Eliminate hard-coded offsets in branchesAlexey Frunze2017-07-301-9/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bulk of the change is in the assemblers and their tests. The main goal is to introduce "bare" branches to labels (as opposed to the existing bare branches with relative offsets, whose direct use we want to eliminate). These branches' delay/forbidden slots are filled manually and these branches do not promote to long (the branch target must be within reach of the individual branch instruction). The secondary goal is to add more branch tests (mainly for bare vs non-bare branches and a few extra) and refactor and reorganize the branch test code a bit. The third goal is to improve idiom recognition in the disassembler, including branch idioms and a few others. Further details: - introduce bare branches (R2 and R6) to labels, making R2 branches available for use on R6 - make use of the above in the code generators - align beqz/bnez with their GNU assembler encoding to simplify and shorten the test code - update the CFI test because of the above - add trivial tests for bare and non-bare branches (addressing existing debt as well) - add MIPS32R6 tests for long beqc/beqzc/bc (debt) - add MIPS64R6 long beqzc test (debt) - group branch tests together - group constant/literal/address-loading tests together - make the disassembler recognize: - b/beqz/bnez (beq/bne with $zero reg) - nal (bltzal with $zero reg) - bal/bgezal (bal = bgezal with $zero reg) - move (or with $zero reg) - li (ori/addiu with $zero reg) - dli (daddiu with $zero reg) - disassemble 16-bit immediate operands (in andi, ori, xori, li, dli) as signed or unsigned as appropriate - drop unused instructions (bltzl, bltzall, addi) from the disassembler as there are no plans to use them Test: test-art-host-gtest Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU Test: test-art-target-gtest Test: testrunner.py --target --optimizing Test: same tests as above on CI20 Test: booted MIPS32R2 in QEMU Change-Id: I62b74a6c00ce0651528114806ba24a59ba564a73
* | Bunch of SIMD for x86 and x86_64Aart Bik2017-08-111-0/+5
|/ | | | | | | | | Rationale: Few instructions needed to implement SIMD reductions. Test: assembler_x86_[64_]test Bug: 64091002 Change-Id: I785acfc6c8c4ad4f290ddeab32da9b767f944e24
* MIPS: Add maddv/msubv MSA instructionsLena Djokic2017-07-251-0/+4
| | | | | | | | | | | | Added maddv.df, msubv.df, fmadd.df and fmsub.df MSA instructions in assembler, disassembler and tests. These instructions are needed for multiplyaccumulate support in ART Vectorizer. Test: mma test-art-host-gtest Change-Id: Idef7faaeed47f1fef83fa58676ce664afe24ffe8
* ART: Include cleanupAndreas Gampe2017-07-241-1/+1
| | | | | | | | | | | | | | | | | | | Let clang-format reorder the header includes. Derived with: * .clang-format: BasedOnStyle: Google IncludeIsMainRegex: '(_test|-inl)?$' * Steps: find . -name '*.cc' -o -name '*.h' | xargs sed -i.bak -e 's/^#include/ #include/' ; git commit -a -m 'ART: Include cleanup' git-clang-format -style=file HEAD^ manual inspection git commit -a --amend Test: mmma art Change-Id: Ia963a8ce3ce5f96b5e78acd587e26908c7a70d02
* MIPS: Print register names instead of register numbers in disassemblerGoran Jakovljevic2017-07-103-11/+38
| | | | | | | Test: ./testrunner.py --optimizing --target on CI20 and in QEMU Test: mma test-art-host-gtest Change-Id: I1fc375ae34ee8fd994192705c45d8f30a35dfc56
* MIPS64: Add min/max MSA instructionsGoran Jakovljevic2017-06-071-0/+6
| | | | | | | | | | Added min_s.df, max_s.df, min_u.df, max_u.df, fmin.df and fmax.df MSA instructions in assembler, disassembler and tests. These instructions are needed for min/max support in ART Vectorizer. Test: mma test-art-host-gtest Change-Id: I4e8dd18ca501ac09d938a49388e4a43116660ec9
* ART: Fix soong defaults orderAndreas Gampe2017-05-241-1/+1
| | | | | | | | | Defaults are prepended in order of their appearance. Move debug defaults first. Bug: 31098551 Test: m test-art-host Change-Id: I9a64db34d0e398d336dac080c7234cad77b719ee
* Merge "Min/max SIMDization support."Aart Bik2017-05-161-1/+65
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| * Min/max SIMDization support.Aart Bik2017-05-151-1/+65
| | | | | | | | | | | | | | | | | | Rationale: The more vectorized, the better! Test: test-art-target, test-art-host Change-Id: I758becca5beaa5b97fab2ab70f2e00cb53458703
* | MIPS64: Add ilvr.df MSA instructionsGoran Jakovljevic2017-05-111-0/+1
|/ | | | | | | | These instructions are needed for compressed string support in ART Vectorizer. Test: mma test-art-host-gtest Change-Id: I269473bb8bcce5aba72201380bb71860e5498d73
* MIPS64: Add add_a.df, ave_s/u.df and aver_s/u.df MSA instructionsGoran Jakovljevic2017-04-211-0/+5
| | | | | | | | | These instructions are needed for implementing VecAbs and VecHalvingAdd visitors. Test: mma test-art-host-gtest Change-Id: Idaec03ea32bbeaba9cb7476dd0f740aa4d9cfa70
* Merge "SIMD pcmpgtb,w,d,q for x86/x86_64"Treehugger Robot2017-04-041-0/+32
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| * SIMD pcmpgtb,w,d,q for x86/x86_64Aart Bik2017-04-041-0/+32
| | | | | | | | | | | | | | | | Rationale: Enables fast compare gt. Test: assembler_x86[_64]_test Change-Id: I0a069649480529f3fec2c2b100e2aaaa2cd79820
* | Merge "MIPS64: Add ldi.df MSA instruction"Aart Bik2017-04-031-0/+15
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| * MIPS64: Add ldi.df MSA instructionGoran Jakovljevic2017-03-311-0/+15
| | | | | | | | | | | | | | | | Also fixes RepeatTemplatedRegisterImmBits template. Test: mma test-art-host-gtest Change-Id: Ib23f8a65ba924623f8c3a2d75d4ec4491d18feb0
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