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| author | Dave Butcher <david.butcher@arm.com> | 2010-06-02 14:52:21 +0100 |
|---|---|---|
| committer | Dave Butcher <david.butcher@arm.com> | 2010-06-04 17:04:19 +0100 |
| commit | b48a4d53bc3349b5c99f8b87a396e7374e2d335c (patch) | |
| tree | c5ae8cc6a7f58a9a9c005b7b5d65f6d84bbbedb1 /vm/compiler/codegen/arm/RallocUtil.c | |
| parent | ddb6aab7f57d3c68941e39a2b49f18603f361218 (diff) | |
Fix for use of UNPREDICTABLE register combination
Use of the LDRD instruction form LDRD Rt, Rt2, [Rn, Rm] has restrictions
on the register combinations - specifically if Rt or Rt2 is equal to Rn or
Rm the behaviour is defined as 'UNPREDICTABLE'.
Change-Id: I19834783865e07897cc7012367e698447f023ce6
Diffstat (limited to 'vm/compiler/codegen/arm/RallocUtil.c')
0 files changed, 0 insertions, 0 deletions