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| author | Bill Buzbee <buzbee@google.com> | 2010-05-13 13:02:53 -0700 |
|---|---|---|
| committer | buzbee <buzbee@google.com> | 2010-05-17 12:18:10 -0700 |
| commit | bd0472480c6e876198fe19c4ffa22350c0ce57da (patch) | |
| tree | 8b217d10bb8bc1349a244b93f0258cea194a0aaa /vm/compiler/codegen/arm/RallocUtil.c | |
| parent | 18d0e3f43f0afd38693baaf74807c37ac9ef5ebe (diff) | |
JIT: Fix for [Issue 2675245] FRF40 monkey crash in jit-cache
The JIT's chaining mechanism suffered from a narrow window that
could result in i-cache inconsistency. One of the forms of chaining
cell consisted of a two 16-bit thumb instruction sequence. If a thread were
interrupted between the execution of those two instructions *and*
another thread picked that moment to convert that cell's
chained/unchained state, then bad things happen.
This CL alters the chain/unchain model somewhat to avoid this case.
Chainable chaining cells grow by 4 bytes each, and instead of rewriting
a 32-bit cell to chain/unchain, we switch between chained and unchained
state by [re]writing the first 16-bits of the cell as either a 16-bit
Thumb unconditional branch (unchained mode) or the first half of a
32-bit Thumb branch. The 2nd 16-bits of the cell will never change once
the cell moves from its inital state - thus avoiding the possibility of it
becoming inconsistent.
This adds a trivial execution penalty on the slow path, but will add
about a kByte of memory usage to a typical process.
Change-Id: Id8b99802e11386cfbab23da6abae10e2d9fc4065
Diffstat (limited to 'vm/compiler/codegen/arm/RallocUtil.c')
0 files changed, 0 insertions, 0 deletions
