Merge remote branch 'goog/dalvik-dev' into dalvik-dev-to-master

9 files changed, 65 insertions, 65 deletions

diff --git a/vm/compiler/codegen/arm/ArchUtility.cpp b/vm/compiler/codegen/arm/ArchUtility.cpp
index f3a2a4b37..0bbb87588 100644
--- a/vm/compiler/codegen/arm/ArchUtility.cpp
+++ b/vm/compiler/codegen/arm/ArchUtility.cpp
@@ -138,11 +138,11 @@ static void buildInsnString(const char *fmt, ArmLIR *lir, char* buf,
                        break;
                    case 'n':
                        operand = ~expandImmediate(operand);
-                       sprintf(tbuf,"%d [0x%x]", operand, operand);
+                       sprintf(tbuf,"%d [%#x]", operand, operand);
                        break;
                    case 'm':
                        operand = expandImmediate(operand);
-                       sprintf(tbuf,"%d [0x%x]", operand, operand);
+                       sprintf(tbuf,"%d [%#x]", operand, operand);
                        break;
                    case 's':
                        sprintf(tbuf,"s%d",operand & FP_REG_MASK);
@@ -304,69 +304,69 @@ void dvmDumpLIRInsn(LIR *arg, unsigned char *baseAddr)
     /* Handle pseudo-ops individually, and all regular insns as a group */
     switch(lir->opcode) {
         case kArmChainingCellBottom:
-            LOGD("-------- end of chaining cells (0x%04x)\n", offset);
+            LOGD("-------- end of chaining cells (0x%04x)", offset);
             break;
         case kArmPseudoBarrier:
             LOGD("-------- BARRIER");
             break;
         case kArmPseudoExtended:
-            LOGD("-------- %s\n", (char *) dest);
+            LOGD("-------- %s", (char *) dest);
             break;
         case kArmPseudoSSARep:
-            DUMP_SSA_REP(LOGD("-------- %s\n", (char *) dest));
+            DUMP_SSA_REP(LOGD("-------- %s", (char *) dest));
             break;
         case kArmPseudoChainingCellBackwardBranch:
-            LOGD("L%p:\n", lir);
-            LOGD("-------- chaining cell (backward branch): 0x%04x\n", dest);
+            LOGD("L%p:", lir);
+            LOGD("-------- chaining cell (backward branch): 0x%04x", dest);
             break;
         case kArmPseudoChainingCellNormal:
-            LOGD("L%p:\n", lir);
-            LOGD("-------- chaining cell (normal): 0x%04x\n", dest);
+            LOGD("L%p:", lir);
+            LOGD("-------- chaining cell (normal): 0x%04x", dest);
             break;
         case kArmPseudoChainingCellHot:
-            LOGD("L%p:\n", lir);
-            LOGD("-------- chaining cell (hot): 0x%04x\n", dest);
+            LOGD("L%p:", lir);
+            LOGD("-------- chaining cell (hot): 0x%04x", dest);
             break;
         case kArmPseudoChainingCellInvokePredicted:
-            LOGD("L%p:\n", lir);
-            LOGD("-------- chaining cell (predicted): %s%s\n",
+            LOGD("L%p:", lir);
+            LOGD("-------- chaining cell (predicted): %s%s",
                  dest ? ((Method *) dest)->clazz->descriptor : "",
                  dest ? ((Method *) dest)->name : "N/A");
             break;
         case kArmPseudoChainingCellInvokeSingleton:
-            LOGD("L%p:\n", lir);
-            LOGD("-------- chaining cell (invoke singleton): %s%s/%p\n",
+            LOGD("L%p:", lir);
+            LOGD("-------- chaining cell (invoke singleton): %s%s/%p",
                  ((Method *)dest)->clazz->descriptor,
                  ((Method *)dest)->name,
                  ((Method *)dest)->insns);
             break;
         case kArmPseudoEntryBlock:
-            LOGD("-------- entry offset: 0x%04x\n", dest);
+            LOGD("-------- entry offset: 0x%04x", dest);
             break;
         case kArmPseudoDalvikByteCodeBoundary:
-            LOGD("-------- dalvik offset: 0x%04x @ %s\n", dest,
+            LOGD("-------- dalvik offset: 0x%04x @ %s", dest,
                  (char *) lir->operands[1]);
             break;
         case kArmPseudoExitBlock:
-            LOGD("-------- exit offset: 0x%04x\n", dest);
+            LOGD("-------- exit offset: 0x%04x", dest);
             break;
         case kArmPseudoPseudoAlign4:
-            LOGD("%p (%04x): .align4\n", baseAddr + offset, offset);
+            LOGD("%p (%04x): .align4", baseAddr + offset, offset);
             break;
         case kArmPseudoPCReconstructionCell:
-            LOGD("L%p:\n", lir);
-            LOGD("-------- reconstruct dalvik PC : 0x%04x @ +0x%04x\n", dest,
+            LOGD("L%p:", lir);
+            LOGD("-------- reconstruct dalvik PC : 0x%04x @ +0x%04x", dest,
                  lir->operands[1]);
             break;
         case kArmPseudoPCReconstructionBlockLabel:
             /* Do nothing */
             break;
         case kArmPseudoEHBlockLabel:
-            LOGD("Exception_Handling:\n");
+            LOGD("Exception_Handling:");
             break;
         case kArmPseudoTargetLabel:
         case kArmPseudoNormalBlockLabel:
-            LOGD("L%p:\n", lir);
+            LOGD("L%p:", lir);
             break;
         default:
             if (lir->flags.isNop && !dumpNop) {
@@ -376,7 +376,7 @@ void dvmDumpLIRInsn(LIR *arg, unsigned char *baseAddr)
                             baseAddr, 256);
             buildInsnString(EncodingMap[lir->opcode].fmt, lir, buf, baseAddr,
                             256);
-            LOGD("%p (%04x): %-8s%s%s\n",
+            LOGD("%p (%04x): %-8s%s%s",
                  baseAddr + offset, offset, opName, buf,
                  lir->flags.isNop ? "(nop)" : "");
             break;
@@ -395,25 +395,25 @@ void dvmDumpLIRInsn(LIR *arg, unsigned char *baseAddr)
 /* Dump instructions and constant pool contents */
 void dvmCompilerCodegenDump(CompilationUnit *cUnit)
 {
-    LOGD("Dumping LIR insns\n");
+    LOGD("Dumping LIR insns");
     LIR *lirInsn;
     ArmLIR *armLIR;
 
-    LOGD("installed code is at %p\n", cUnit->baseAddr);
-    LOGD("total size is %d bytes\n", cUnit->totalSize);
+    LOGD("installed code is at %p", cUnit->baseAddr);
+    LOGD("total size is %d bytes", cUnit->totalSize);
     for (lirInsn = cUnit->firstLIRInsn; lirInsn; lirInsn = lirInsn->next) {
         dvmDumpLIRInsn(lirInsn, (unsigned char *) cUnit->baseAddr);
     }
     for (lirInsn = cUnit->classPointerList; lirInsn; lirInsn = lirInsn->next) {
         armLIR = (ArmLIR *) lirInsn;
-        LOGD("%p (%04x): .class (%s)\n",
+        LOGD("%p (%04x): .class (%s)",
              (char*)cUnit->baseAddr + armLIR->generic.offset,
              armLIR->generic.offset,
              ((CallsiteInfo *) armLIR->operands[0])->classDescriptor);
     }
     for (lirInsn = cUnit->literalList; lirInsn; lirInsn = lirInsn->next) {
         armLIR = (ArmLIR *) lirInsn;
-        LOGD("%p (%04x): .word (0x%x)\n",
+        LOGD("%p (%04x): .word (%#x)",
              (char*)cUnit->baseAddr + armLIR->generic.offset,
              armLIR->generic.offset,
              armLIR->operands[0]);
diff --git a/vm/compiler/codegen/arm/Assemble.cpp b/vm/compiler/codegen/arm/Assemble.cpp
index a433c31d4..312e7c1c0 100644
--- a/vm/compiler/codegen/arm/Assemble.cpp
+++ b/vm/compiler/codegen/arm/Assemble.cpp
@@ -958,7 +958,7 @@ static AssemblerStatus assembleInstructions(CompilationUnit *cUnit,
             intptr_t target = lirTarget->generic.offset;
             int delta = target - pc;
             if (delta & 0x3) {
-                LOGE("PC-rel distance is not multiples of 4: %d\n", delta);
+                LOGE("PC-rel distance is not multiples of 4: %d", delta);
                 dvmCompilerAbort(cUnit);
             }
             if ((lir->opcode == kThumb2LdrPcRel12) && (delta > 4091)) {
@@ -1035,7 +1035,7 @@ static AssemblerStatus assembleInstructions(CompilationUnit *cUnit,
             intptr_t target = targetLIR->generic.offset;
             int delta = target - pc;
             if (delta > 2046 || delta < -2048) {
-                LOGE("Unconditional branch distance out of range: %d\n", delta);
+                LOGE("Unconditional branch distance out of range: %d", delta);
                 dvmCompilerAbort(cUnit);
             }
             lir->operands[0] = delta >> 1;
@@ -1437,7 +1437,7 @@ void dvmCompilerAssembleLIR(CompilationUnit *cUnit, JitTranslationInfo *info)
     /* Allocate enough space for the code block */
     cUnit->codeBuffer = (unsigned char *)dvmCompilerNew(chainCellOffset, true);
     if (cUnit->codeBuffer == NULL) {
-        LOGE("Code buffer allocation failure\n");
+        LOGE("Code buffer allocation failure");
         info->discardResult = true;
         return;
     }
@@ -1604,7 +1604,7 @@ void* dvmJitChain(void* tgtAddr, u4* branchAddr)
         gDvmJit.translationChains++;
 
         COMPILER_TRACE_CHAINING(
-            LOGD("Jit Runtime: chaining 0x%x to 0x%x\n",
+            LOGD("Jit Runtime: chaining %#x to %#x",
                  (int) branchAddr, (int) tgtAddr & -2));
 
         /*
@@ -1943,7 +1943,7 @@ static u4* unchainSingle(JitEntry *trace)
                     dvmAbort();  // dvmAbort OK here - can't safely recover
             }
             COMPILER_TRACE_CHAINING(
-                LOGD("Jit Runtime: unchaining 0x%x", (int)pChainCells));
+                LOGD("Jit Runtime: unchaining %#x", (int)pChainCells));
             pChainCells += elemSize;  /* Advance by a fixed number of words */
         }
     }
@@ -2423,7 +2423,7 @@ static int selfVerificationLoad(int addr, int size)
             dvmAbort();
     }
 
-    //LOGD("*** HEAP LOAD: Addr: 0x%x Data: 0x%x Size: %d", addr, data, size);
+    //LOGD("*** HEAP LOAD: Addr: %#x Data: %#x Size: %d", addr, data, size);
     return data;
 }
 
@@ -2447,7 +2447,7 @@ static s8 selfVerificationLoadDoubleword(int addr)
         }
     }
 
-    //LOGD("*** HEAP LOAD DOUBLEWORD: Addr: 0x%x Data: 0x%x Data2: 0x%x",
+    //LOGD("*** HEAP LOAD DOUBLEWORD: Addr: %#x Data: %#x Data2: %#x",
     //    addr, data, data2);
     return (((s8) data2) << 32) | data;
 }
@@ -2467,7 +2467,7 @@ static void selfVerificationStore(int addr, int data, int size)
     int maskedAddr = addr & 0xFFFFFFFC;
     int alignment = addr & 0x3;
 
-    //LOGD("*** HEAP STORE: Addr: 0x%x Data: 0x%x Size: %d", addr, data, size);
+    //LOGD("*** HEAP STORE: Addr: %#x Data: %#x Size: %d", addr, data, size);
 
     for (heapSpacePtr = shadowSpace->heapSpace;
          heapSpacePtr != shadowSpace->heapSpaceTail; heapSpacePtr++) {
@@ -2515,7 +2515,7 @@ static void selfVerificationStoreDoubleword(int addr, s8 double_data)
     int data2 = double_data >> 32;
     bool store1 = false, store2 = false;
 
-    //LOGD("*** HEAP STORE DOUBLEWORD: Addr: 0x%x Data: 0x%x, Data2: 0x%x",
+    //LOGD("*** HEAP STORE DOUBLEWORD: Addr: %#x Data: %#x, Data2: %#x",
     //    addr, data, data2);
 
     for (heapSpacePtr = shadowSpace->heapSpace;
@@ -2628,7 +2628,7 @@ void dvmSelfVerificationMemOpDecode(int lr, int* sp)
 
     if ((insn & kMemOp2) == kMemOp2) {
         insn = (insn << 16) | (insn >> 16);
-        //LOGD("*** THUMB2 - Addr: 0x%x Insn: 0x%x", lr, insn);
+        //LOGD("*** THUMB2 - Addr: %#x Insn: %#x", lr, insn);
 
         int opcode12 = (insn >> 20) & 0xFFF;
         int opcode4 = (insn >> 8) & 0xF;
@@ -2795,7 +2795,7 @@ void dvmSelfVerificationMemOpDecode(int lr, int* sp)
             }
         }
     } else {
-        //LOGD("*** THUMB - Addr: 0x%x Insn: 0x%x", lr, insn);
+        //LOGD("*** THUMB - Addr: %#x Insn: %#x", lr, insn);
 
         // Update the link register
         selfVerificationMemRegStore(sp, old_lr+2, 13);
diff --git a/vm/compiler/codegen/arm/CodegenDriver.cpp b/vm/compiler/codegen/arm/CodegenDriver.cpp
index ac5936007..53dd8feff 100644
--- a/vm/compiler/codegen/arm/CodegenDriver.cpp
+++ b/vm/compiler/codegen/arm/CodegenDriver.cpp
@@ -837,7 +837,7 @@ static bool genArithOpInt(CompilationUnit *cUnit, MIR *mir,
             op = kOpLsr;
             break;
         default:
-            LOGE("Invalid word arith op: 0x%x(%d)",
+            LOGE("Invalid word arith op: %#x(%d)",
                  mir->dalvikInsn.opcode, mir->dalvikInsn.opcode);
             dvmCompilerAbort(cUnit);
     }
@@ -1477,7 +1477,7 @@ static bool handleFmt10x(CompilationUnit *cUnit, MIR *mir)
 {
     Opcode dalvikOpcode = mir->dalvikInsn.opcode;
     if ((dalvikOpcode >= OP_UNUSED_3E) && (dalvikOpcode <= OP_UNUSED_43)) {
-        LOGE("Codegen: got unused opcode 0x%x\n",dalvikOpcode);
+        LOGE("Codegen: got unused opcode %#x",dalvikOpcode);
         return true;
     }
     switch (dalvikOpcode) {
@@ -1491,7 +1491,7 @@ static bool handleFmt10x(CompilationUnit *cUnit, MIR *mir)
         case OP_UNUSED_79:
         case OP_UNUSED_7A:
         case OP_DISPATCH_FF:
-            LOGE("Codegen: got unused opcode 0x%x\n",dalvikOpcode);
+            LOGE("Codegen: got unused opcode %#x",dalvikOpcode);
             return true;
         case OP_NOP:
             break;
@@ -1629,7 +1629,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
         case OP_SGET_BYTE_JUMBO:
         case OP_SGET_SHORT:
         case OP_SGET_SHORT_JUMBO: {
-            int valOffset = offsetof(StaticField, value);
+            int valOffset = OFFSETOF_MEMBER(StaticField, value);
             int tReg = dvmCompilerAllocTemp(cUnit);
             bool isVolatile;
             const Method *method = (mir->OptimizationFlags & MIR_CALLEE) ?
@@ -1678,7 +1678,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
         }
         case OP_SGET_WIDE:
         case OP_SGET_WIDE_JUMBO: {
-            int valOffset = offsetof(StaticField, value);
+            int valOffset = OFFSETOF_MEMBER(StaticField, value);
             const Method *method = (mir->OptimizationFlags & MIR_CALLEE) ?
                 mir->meta.calleeMethod : cUnit->method;
             void *fieldPtr = (void*)
@@ -1718,7 +1718,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
         case OP_SPUT_BYTE_JUMBO:
         case OP_SPUT_SHORT:
         case OP_SPUT_SHORT_JUMBO: {
-            int valOffset = offsetof(StaticField, value);
+            int valOffset = OFFSETOF_MEMBER(StaticField, value);
             int tReg = dvmCompilerAllocTemp(cUnit);
             int objHead;
             bool isVolatile;
@@ -1755,7 +1755,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
             loadConstant(cUnit, tReg,  (int) fieldPtr);
             if (isSputObject) {
                 objHead = dvmCompilerAllocTemp(cUnit);
-                loadWordDisp(cUnit, tReg, offsetof(Field, clazz), objHead);
+                loadWordDisp(cUnit, tReg, OFFSETOF_MEMBER(Field, clazz), objHead);
             }
             HEAP_ACCESS_SHADOW(true);
             storeWordDisp(cUnit, tReg, valOffset ,rlSrc.lowReg);
@@ -1775,7 +1775,7 @@ static bool handleFmt21c_Fmt31c_Fmt41c(CompilationUnit *cUnit, MIR *mir)
         case OP_SPUT_WIDE:
         case OP_SPUT_WIDE_JUMBO: {
             int tReg = dvmCompilerAllocTemp(cUnit);
-            int valOffset = offsetof(StaticField, value);
+            int valOffset = OFFSETOF_MEMBER(StaticField, value);
             const Method *method = (mir->OptimizationFlags & MIR_CALLEE) ?
                 mir->meta.calleeMethod : cUnit->method;
             void *fieldPtr = (void*)
@@ -2155,7 +2155,7 @@ static bool handleFmt21t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
             break;
         default:
             cond = (ArmConditionCode)0;
-            LOGE("Unexpected opcode (%d) for Fmt21t\n", dalvikOpcode);
+            LOGE("Unexpected opcode (%d) for Fmt21t", dalvikOpcode);
             dvmCompilerAbort(cUnit);
     }
     genConditionalBranch(cUnit, cond, &labelList[bb->taken->id]);
@@ -2700,7 +2700,7 @@ static bool handleFmt22t(CompilationUnit *cUnit, MIR *mir, BasicBlock *bb,
             break;
         default:
             cond = (ArmConditionCode)0;
-            LOGE("Unexpected opcode (%d) for Fmt22t\n", dalvikOpcode);
+            LOGE("Unexpected opcode (%d) for Fmt22t", dalvikOpcode);
             dvmCompilerAbort(cUnit);
     }
     genConditionalBranch(cUnit, cond, &labelList[bb->taken->id]);
@@ -4547,7 +4547,7 @@ void dvmCompilerMIR2LIR(CompilationUnit *cUnit)
                     }
                 }
                 if (notHandled) {
-                    LOGE("%#06x: Opcode 0x%x (%s) / Fmt %d not handled\n",
+                    LOGE("%#06x: Opcode %#x (%s) / Fmt %d not handled",
                          mir->offset,
                          dalvikOpcode, dexGetOpcodeName(dalvikOpcode),
                          dalvikFormat);
diff --git a/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.cpp b/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.cpp
index 8ab956ec7..5188417c9 100644
--- a/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.cpp
+++ b/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.cpp
@@ -62,11 +62,11 @@ bool dvmCompilerArchVariantInit(void)
 #endif
 
     /* Codegen-specific assumptions */
-    assert(offsetof(ClassObject, vtable) < 128 &&
-           (offsetof(ClassObject, vtable) & 0x3) == 0);
-    assert(offsetof(ArrayObject, length) < 128 &&
-           (offsetof(ArrayObject, length) & 0x3) == 0);
-    assert(offsetof(ArrayObject, contents) < 256);
+    assert(OFFSETOF_MEMBER(ClassObject, vtable) < 128 &&
+           (OFFSETOF_MEMBER(ClassObject, vtable) & 0x3) == 0);
+    assert(OFFSETOF_MEMBER(ArrayObject, length) < 128 &&
+           (OFFSETOF_MEMBER(ArrayObject, length) & 0x3) == 0);
+    assert(OFFSETOF_MEMBER(ArrayObject, contents) < 256);
 
     /* Up to 5 args are pushed on top of FP - sizeofStackSaveArea */
     assert(sizeof(StackSaveArea) < 236);
diff --git a/vm/compiler/codegen/arm/armv5te/ArchVariant.cpp b/vm/compiler/codegen/arm/armv5te/ArchVariant.cpp
index 3e13af5bf..f394aa1c8 100644
--- a/vm/compiler/codegen/arm/armv5te/ArchVariant.cpp
+++ b/vm/compiler/codegen/arm/armv5te/ArchVariant.cpp
@@ -62,8 +62,8 @@ bool dvmCompilerArchVariantInit(void)
 #endif
 
     /* Codegen-specific assumptions */
-    assert(offsetof(ClassObject, vtable) < 128 &&
-           (offsetof(ClassObject, vtable) & 0x3) == 0);
+    assert(OFFSETOF_MEMBER(ClassObject, vtable) < 128 &&
+           (OFFSETOF_MEMBER(ClassObject, vtable) & 0x3) == 0);
     assert(OFFSETOF_MEMBER(ArrayObject, length) < 128 &&
            (OFFSETOF_MEMBER(ArrayObject, length) & 0x3) == 0);
     assert(OFFSETOF_MEMBER(ArrayObject, contents) < 256);
diff --git a/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.cpp b/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.cpp
index d68d150da..c3fe518e0 100644
--- a/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.cpp
+++ b/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.cpp
@@ -57,8 +57,8 @@ bool dvmCompilerArchVariantInit(void)
 #endif
 
     /* Codegen-specific assumptions */
-    assert(offsetof(ClassObject, vtable) < 128 &&
-           (offsetof(ClassObject, vtable) & 0x3) == 0);
+    assert(OFFSETOF_MEMBER(ClassObject, vtable) < 128 &&
+           (OFFSETOF_MEMBER(ClassObject, vtable) & 0x3) == 0);
     assert(OFFSETOF_MEMBER(ArrayObject, length) < 128 &&
            (OFFSETOF_MEMBER(ArrayObject, length) & 0x3) == 0);
     assert(OFFSETOF_MEMBER(ArrayObject, contents) < 256);
diff --git a/vm/compiler/codegen/arm/armv7-a-neon/MethodCodegenDriver.cpp b/vm/compiler/codegen/arm/armv7-a-neon/MethodCodegenDriver.cpp
index 32065aebd..4ddad6903 100644
--- a/vm/compiler/codegen/arm/armv7-a-neon/MethodCodegenDriver.cpp
+++ b/vm/compiler/codegen/arm/armv7-a-neon/MethodCodegenDriver.cpp
@@ -400,7 +400,7 @@ static bool methodBlockCodeGen(CompilationUnit *cUnit, BasicBlock *bb)
         }
 
         if (notHandled) {
-            LOGE("%#06x: Opcode 0x%x (%s) / Fmt %d not handled\n",
+            LOGE("%#06x: Opcode %#x (%s) / Fmt %d not handled",
                  mir->offset,
                  dalvikOpcode, dexGetOpcodeName(dalvikOpcode),
                  dalvikFormat);
diff --git a/vm/compiler/codegen/arm/armv7-a/ArchVariant.cpp b/vm/compiler/codegen/arm/armv7-a/ArchVariant.cpp
index d68d150da..c3fe518e0 100644
--- a/vm/compiler/codegen/arm/armv7-a/ArchVariant.cpp
+++ b/vm/compiler/codegen/arm/armv7-a/ArchVariant.cpp
@@ -57,8 +57,8 @@ bool dvmCompilerArchVariantInit(void)
 #endif
 
     /* Codegen-specific assumptions */
-    assert(offsetof(ClassObject, vtable) < 128 &&
-           (offsetof(ClassObject, vtable) & 0x3) == 0);
+    assert(OFFSETOF_MEMBER(ClassObject, vtable) < 128 &&
+           (OFFSETOF_MEMBER(ClassObject, vtable) & 0x3) == 0);
     assert(OFFSETOF_MEMBER(ArrayObject, length) < 128 &&
            (OFFSETOF_MEMBER(ArrayObject, length) & 0x3) == 0);
     assert(OFFSETOF_MEMBER(ArrayObject, contents) < 256);
diff --git a/vm/compiler/codegen/x86/ia32/ArchVariant.cpp b/vm/compiler/codegen/x86/ia32/ArchVariant.cpp
index 5ccd26d0f..9f17522a5 100644
--- a/vm/compiler/codegen/x86/ia32/ArchVariant.cpp
+++ b/vm/compiler/codegen/x86/ia32/ArchVariant.cpp
@@ -62,8 +62,8 @@ bool dvmCompilerArchVariantInit(void)
 #endif
 
     /* Codegen-specific assumptions */
-    assert(offsetof(ClassObject, vtable) < 128 &&
-           (offsetof(ClassObject, vtable) & 0x3) == 0);
+    assert(OFFSETOF_MEMBER(ClassObject, vtable) < 128 &&
+           (OFFSETOF_MEMBER(ClassObject, vtable) & 0x3) == 0);
     assert(OFFSETOF_MEMBER(ArrayObject, length) < 128 &&
            (OFFSETOF_MEMBER(ArrayObject, length) & 0x3) == 0);
     assert(OFFSETOF_MEMBER(ArrayObject, contents) < 256);