diff options
| author | Christopher R. Palmer <crpalmer@gmail.com> | 2015-06-27 21:30:50 -0400 |
|---|---|---|
| committer | Christopher R. Palmer <crpalmer@gmail.com> | 2015-06-27 21:45:42 -0400 |
| commit | e14ef1b3a61ed2e336485048de23344a3fe25d51 (patch) | |
| tree | 5554e1bbec76a9ecae4c59d692a684b14136c722 /kernel-headers | |
| parent | fa4fd79eee6c80a6c58d73915be7cb6a15354ec2 (diff) | |
Replace the fugu kernel headers with ones from ours
Generated by finding the approriate headers, copying them to
/tmp/original and then running
~/cm-12.1/bionic/libc/kernel/tools/update_all.py /tmp/original/
and finally then copying the auto-generated files from
bionic/libc/kernel/common/
to the appropriate sub-dir here.
Change-Id: I09a80d9cb4b8a49a56c4907db3601dd37a92f3e3
Diffstat (limited to 'kernel-headers')
| -rw-r--r-- | kernel-headers/drm/psb_ttm_fence_user.h | 1 | ||||
| -rw-r--r-- | kernel-headers/drm/psb_ttm_placement_user.h | 1 | ||||
| -rw-r--r-- | kernel-headers/linux/kct.h | 38 | ||||
| -rw-r--r-- | kernel-headers/linux/psb_drm.h | 309 | ||||
| -rw-r--r-- | kernel-headers/linux/sound/intel_sst_ioctl.h | 1 |
5 files changed, 209 insertions, 141 deletions
diff --git a/kernel-headers/drm/psb_ttm_fence_user.h b/kernel-headers/drm/psb_ttm_fence_user.h index 04c6295..f1c1c7a 100644 --- a/kernel-headers/drm/psb_ttm_fence_user.h +++ b/kernel-headers/drm/psb_ttm_fence_user.h @@ -69,4 +69,3 @@ struct ttm_fence_unref_arg { #define TTM_FENCE_FINISH 0x02 #define TTM_FENCE_UNREF 0x03 #endif - diff --git a/kernel-headers/drm/psb_ttm_placement_user.h b/kernel-headers/drm/psb_ttm_placement_user.h index 7d98056..5a033aa 100644 --- a/kernel-headers/drm/psb_ttm_placement_user.h +++ b/kernel-headers/drm/psb_ttm_placement_user.h @@ -122,4 +122,3 @@ union ttm_pl_create_ub_arg { #define TTM_PL_CREATE_UB 0x06 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #endif - diff --git a/kernel-headers/linux/kct.h b/kernel-headers/linux/kct.h index 3c72535..2fb92c0 100644 --- a/kernel-headers/linux/kct.h +++ b/kernel-headers/linux/kct.h @@ -49,58 +49,50 @@ enum ct_attchmt_type { CT_ATTCHMT_DATA4, CT_ATTCHMT_DATA5, CT_ATTCHMT_BINARY, - CT_ATTCHMT_FILELIST + CT_ATTCHMT_FILELIST, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + CT_ATTCHMT_ADDITIONAL }; +#define CT_ADDITIONAL_NONE 0 +#define CT_ADDITIONAL_APLOG (1<<0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CT_ADDITIONAL_LAST_KMSG (1<<1) +#define CT_ADDITIONAL_FWMSG (1<<2) struct ct_attchmt { __u32 size; - enum ct_attchmt_type type; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + enum ct_attchmt_type type; char data[]; } __aligned(4); struct ct_event { - __u64 timestamp; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __u64 timestamp; char submitter_name[MAX_SB_N]; char ev_name[MAX_EV_N]; enum ct_ev_type type; - __u32 attchmt_size; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __u32 attchmt_size; __u32 flags; struct ct_attchmt attachments[]; } __aligned(4); -enum kct_nlmsg_type { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum kct_nlmsg_type { KCT_EVENT, KCT_SET_PID = 4200, }; -struct kct_packet { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct kct_packet { struct nlmsghdr nlh; struct ct_event event; }; -#define ATTCHMT_ALIGNMENT 4 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ATTCHMT_ALIGNMENT 4 #ifndef KCT_ALIGN #define __KCT_ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask)) #define __KCT_ALIGN(x, a) __KCT_ALIGN_MASK(x, (typeof(x))(a) - 1) -#define KCT_ALIGN(x, a) __KCT_ALIGN((x), (a)) /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KCT_ALIGN(x, a) __KCT_ALIGN((x), (a)) #endif #define foreach_attchmt(Event, Attchmt) if ((Event)->attchmt_size) for ((Attchmt) = (Event)->attachments; (Attchmt) < (typeof(Attchmt))(((char *) (Event)->attachments) + (Event)->attchmt_size); (Attchmt) = (typeof(Attchmt))KCT_ALIGN(((size_t)(Attchmt)) + sizeof(*(Attchmt)) + (Attchmt)->size, ATTCHMT_ALIGNMENT)) -#define MKFN(fn, ...) MKFN_N(fn, ##__VA_ARGS__, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0)(__VA_ARGS__) -#define MKFN_N(fn, n0, n1, n2, n3, n4, n5, n6, n7, n8, n9, n10, n11, n, ...) fn##n -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define kct_log(...) MKFN(__kct_log_, ##__VA_ARGS__) -#define __kct_log_4(Type, Submitter_name, Ev_name, flags) do { if (kct_alloc_event) { struct ct_event *__ev = kct_alloc_event(Submitter_name, Ev_name, Type, GFP_ATOMIC, flags); if (__ev) { kct_log_event(__ev, GFP_ATOMIC); } } } while (0) -#define __kct_log_5(Type, Submitter_name, Ev_name, flags, Data0) do { if (kct_alloc_event) { struct ct_event *__ev = kct_alloc_event(Submitter_name, Ev_name, Type, GFP_ATOMIC, flags); if (__ev) { if (Data0) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA0, strlen(Data0) + 1, Data0, GFP_ATOMIC); kct_log_event(__ev, GFP_ATOMIC); } } } while (0) -#define __kct_log_6(Type, Submitter_name, Ev_name, flags, Data0, Data1) do { if (kct_alloc_event) { struct ct_event *__ev = kct_alloc_event(Submitter_name, Ev_name, Type, GFP_ATOMIC, flags); if (__ev) { if (Data0) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA0, strlen(Data0) + 1, Data0, GFP_ATOMIC); if (Data1) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA1, strlen(Data1) + 1, Data1, GFP_ATOMIC); kct_log_event(__ev, GFP_ATOMIC); } } } while (0) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define __kct_log_7(Type, Submitter_name, Ev_name, flags, Data0, Data1, Data2) do { if (kct_alloc_event) { struct ct_event *__ev = kct_alloc_event(Submitter_name, Ev_name, Type, GFP_ATOMIC, flags); if (__ev) { if (Data0) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA0, strlen(Data0) + 1, Data0, GFP_ATOMIC); if (Data1) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA1, strlen(Data1) + 1, Data1, GFP_ATOMIC); if (Data2) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA2, strlen(Data2) + 1, Data2, GFP_ATOMIC); kct_log_event(__ev, GFP_ATOMIC); } } } while (0) -#define __kct_log_8(Type, Submitter_name, Ev_name, flags, Data0, Data1, Data2, Data3) do { if (kct_alloc_event) { struct ct_event *__ev = kct_alloc_event(Submitter_name, Ev_name, Type, GFP_ATOMIC, flags); if (__ev) { if (Data0) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA0, strlen(Data0) + 1, Data0, GFP_ATOMIC); if (Data1) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA1, strlen(Data1) + 1, Data1, GFP_ATOMIC); if (Data2) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA2, strlen(Data2) + 1, Data2, GFP_ATOMIC); if (Data3) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA3, strlen(Data3) + 1, Data3, GFP_ATOMIC); kct_log_event(__ev, GFP_ATOMIC); } } } while (0) -#define __kct_log_9(Type, Submitter_name, Ev_name, flags, Data0, Data1, Data2, Data3, Data4) do { if (kct_alloc_event) { struct ct_event *__ev = kct_alloc_event(Submitter_name, Ev_name, Type, GFP_ATOMIC, flags); if (__ev) { if (Data0) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA0, strlen(Data0) + 1, Data0, GFP_ATOMIC); if (Data1) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA1, strlen(Data1) + 1, Data1, GFP_ATOMIC); if (Data2) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA2, strlen(Data2) + 1, Data2, GFP_ATOMIC); if (Data3) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA3, strlen(Data3) + 1, Data3, GFP_ATOMIC); if (Data4) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA4, strlen(Data4) + 1, Data4, GFP_ATOMIC); kct_log_event(__ev, GFP_ATOMIC); } } } while (0) -#define __kct_log_10(Type, Submitter_name, Ev_name, flags, Data0, Data1, Data2, Data3, Data4, Data5) do { if (kct_alloc_event) { struct ct_event *__ev = kct_alloc_event(Submitter_name, Ev_name, Type, GFP_ATOMIC, flags); if (__ev) { if (Data0) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA0, strlen(Data0) + 1, Data0, GFP_ATOMIC); if (Data1) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA1, strlen(Data1) + 1, Data1, GFP_ATOMIC); if (Data2) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA2, strlen(Data2) + 1, Data2, GFP_ATOMIC); if (Data3) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA3, strlen(Data3) + 1, Data3, GFP_ATOMIC); if (Data4) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA4, strlen(Data4) + 1, Data4, GFP_ATOMIC); if (Data5) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA5, strlen(Data5) + 1, Data5, GFP_ATOMIC); kct_log_event(__ev, GFP_ATOMIC); } } } while (0) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -#define __kct_log_11(Type, Submitter_name, Ev_name, flags, Data0, Data1, Data2, Data3, Data4, Data5, filelist) do { if (kct_alloc_event) { struct ct_event *__ev = kct_alloc_event(Submitter_name, Ev_name, Type, GFP_ATOMIC, flags); if (__ev) { if (Data0) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA0, strlen(Data0) + 1, Data0, GFP_ATOMIC); if (Data1) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA1, strlen(Data1) + 1, Data1, GFP_ATOMIC); if (Data2) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA2, strlen(Data2) + 1, Data2, GFP_ATOMIC); if (Data3) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA3, strlen(Data3) + 1, Data3, GFP_ATOMIC); if (Data4) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA4, strlen(Data4) + 1, Data4, GFP_ATOMIC); if (Data5) kct_add_attchmt(&__ev, CT_ATTCHMT_DATA5, strlen(Data5) + 1, Data5, GFP_ATOMIC); if (filelist) kct_add_attchmt(&__ev, CT_ATTCHMT_FILELIST, strlen(filelist) + 1, filelist, GFP_ATOMIC); kct_log_event(__ev, GFP_ATOMIC); } } } while (0) #endif - +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/kernel-headers/linux/psb_drm.h b/kernel-headers/linux/psb_drm.h index da92281..5cb7384 100644 --- a/kernel-headers/linux/psb_drm.h +++ b/kernel-headers/linux/psb_drm.h @@ -18,7 +18,7 @@ ****************************************************************************/ #ifndef _PSB_DRM_H_ #define _PSB_DRM_H_ -#if defined(__linux__) && !defined(__KERNEL__) +#ifdef __linux__ #include <stdbool.h> /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #include <stdint.h> @@ -629,558 +629,637 @@ struct drm_psb_stolen_memory_arg { #define VSYNC_DISABLE (1 << 1) #define VSYNC_WAIT (1 << 2) #define GET_VSYNC_COUNT (1 << 3) +#define N_HORIZ_Y_TAPS 5 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define N_VERT_Y_TAPS 3 +#define N_HORIZ_UV_TAPS 3 +#define N_VERT_UV_TAPS 3 +#define N_PHASES 17 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAX_TAPS 5 +struct overlay_ctrl_blk { + uint32_t OBUF_0Y; + uint32_t OBUF_1Y; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t OBUF_0U; + uint32_t OBUF_0V; + uint32_t OBUF_1U; + uint32_t OBUF_1V; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t OSTRIDE; + uint32_t YRGB_VPH; + uint32_t UV_VPH; + uint32_t HORZ_PH; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t INIT_PHS; + uint32_t DWINPOS; + uint32_t DWINSZ; + uint32_t SWIDTH; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t SWIDTHSW; + uint32_t SHEIGHT; + uint32_t YRGBSCALE; + uint32_t UVSCALE; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t OCLRC0; + uint32_t OCLRC1; + uint32_t DCLRKV; + uint32_t DCLRKM; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t SCHRKVH; + uint32_t SCHRKVL; + uint32_t SCHRKEN; + uint32_t OCONFIG; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t OCMD; + uint32_t RESERVED1; + uint32_t OSTART_0Y; + uint32_t OSTART_1Y; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t OSTART_0U; + uint32_t OSTART_0V; + uint32_t OSTART_1U; + uint32_t OSTART_1V; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t OTILEOFF_0Y; + uint32_t OTILEOFF_1Y; + uint32_t OTILEOFF_0U; + uint32_t OTILEOFF_0V; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t OTILEOFF_1U; + uint32_t OTILEOFF_1V; + uint32_t FASTHSCALE; + uint32_t UVSCALEV; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t RESERVEDC[(0x200 - 0xA8) / 4]; + uint16_t Y_VCOEFS[N_VERT_Y_TAPS * N_PHASES]; + uint16_t RESERVEDD[0x100 / 2 - N_VERT_Y_TAPS * N_PHASES]; + uint16_t Y_HCOEFS[N_HORIZ_Y_TAPS * N_PHASES]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint16_t RESERVEDE[0x200 / 2 - N_HORIZ_Y_TAPS * N_PHASES]; + uint16_t UV_VCOEFS[N_VERT_UV_TAPS * N_PHASES]; + uint16_t RESERVEDF[0x100 / 2 - N_VERT_UV_TAPS * N_PHASES]; + uint16_t UV_HCOEFS[N_HORIZ_UV_TAPS * N_PHASES]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint16_t RESERVEDG[0x100 / 2 - N_HORIZ_UV_TAPS * N_PHASES]; +}; struct intel_overlay_context { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t index; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t pipe; uint32_t ovadd; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct intel_sprite_context { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t update_mask; uint32_t index; uint32_t pipe; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t cntr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t linoff; uint32_t stride; uint32_t pos; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t size; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t keyminval; uint32_t keymask; uint32_t surf; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t keymaxval; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t tileoff; uint32_t contalpa; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define INTEL_SPRITE_PLANE_NUM 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define INTEL_OVERLAY_PLANE_NUM 2 #define INTEL_DISPLAY_PLANE_NUM 5 #define INTEL_MDFLD_SPRITE_PLANE_NUM 3 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define INTEL_MDFLD_OVERLAY_PLANE_NUM 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define INTEL_MDFLD_CURSOR_PLANE_NUM 3 #define INTEL_MDFLD_DISPLAY_PLANE_NUM 8 #define INTEL_MDFLD_DISPLAY_PIPE_NUM 3 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define INTEL_CTP_SPRITE_PLANE_NUM 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define INTEL_CTP_OVERLAY_PLANE_NUM 1 #define INTEL_CTP_CURSOR_PLANE_NUM 2 #define INTEL_CTP_DISPLAY_PLANE_NUM 5 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define INTEL_CTP_DISPLAY_PIPE_NUM 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define INVALID_INDEX 0xffffffff struct mdfld_plane_contexts { uint32_t active_primaries; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t active_sprites; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t active_overlays; struct intel_sprite_context primary_contexts[INTEL_SPRITE_PLANE_NUM]; struct intel_sprite_context sprite_contexts[INTEL_SPRITE_PLANE_NUM]; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct intel_overlay_context overlay_contexts[INTEL_OVERLAY_PLANE_NUM]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct drm_psb_vsync_set_arg { uint32_t vsync_operation_mask; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t pipe; int vsync_pipe; int vsync_count; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint64_t timestamp; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } vsync; }; struct drm_psb_dc_info { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t pipe_count; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t primary_plane_count; uint32_t sprite_plane_count; uint32_t overlay_plane_count; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t cursor_plane_count; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct drm_psb_register_rw_arg { uint32_t b_force_hw_on; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t display_read_mask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t display_write_mask; struct { uint32_t pfit_controls; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t pfit_autoscale_ratios; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t pfit_programmed_scale_ratios; uint32_t pipeasrc; uint32_t pipebsrc; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t vtotal_a; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t vtotal_b; uint32_t dspcntr_a; uint32_t dspcntr_b; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t pipestat_a; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t int_mask; uint32_t int_enable; } display; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t overlay_read_mask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t overlay_write_mask; struct { uint32_t OVADD; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t OGAMC0; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t OGAMC1; uint32_t OGAMC2; uint32_t OGAMC3; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t OGAMC4; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t OGAMC5; uint32_t IEP_ENABLED; uint32_t IEP_BLE_MINMAX; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t IEP_BSSCC_CONTROL; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t index; uint32_t b_wait_vblank; uint32_t b_wms; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t buffer_handle; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t backbuf_index; + uint32_t backbuf_addr; } overlay; uint32_t vsync_operation_mask; - struct { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct { uint32_t pipe; int vsync_pipe; int vsync_count; - uint64_t timestamp; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint64_t timestamp; } vsync; uint32_t sprite_enable_mask; uint32_t sprite_disable_mask; - struct { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct { uint32_t dspa_control; uint32_t dspa_key_value; uint32_t dspa_key_mask; - uint32_t dspc_control; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t dspc_control; uint32_t dspc_stride; uint32_t dspc_position; uint32_t dspc_linear_offset; - uint32_t dspc_size; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t dspc_size; uint32_t dspc_surface; } sprite; uint32_t subpicture_enable_mask; - uint32_t subpicture_disable_mask; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t subpicture_disable_mask; struct { uint32_t CursorADDR; uint32_t xPos; - uint32_t yPos; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t yPos; uint32_t CursorSize; } cursor; uint32_t cursor_enable_mask; - uint32_t cursor_disable_mask; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t cursor_disable_mask; uint32_t plane_enable_mask; uint32_t plane_disable_mask; uint32_t get_plane_state_mask; - struct { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct { uint32_t type; uint32_t index; uint32_t ctx; - } plane; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } plane; }; enum { PSB_DC_PLANE_ENABLED, - PSB_DC_PLANE_DISABLED, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + PSB_DC_PLANE_DISABLED, }; enum { PSB_GTT_MAP_TYPE_MEMINFO = 0, - PSB_GTT_MAP_TYPE_BCD, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + PSB_GTT_MAP_TYPE_BCD, PSB_GTT_MAP_TYPE_BCD_INFO, PSB_GTT_MAP_TYPE_VIRTUAL, }; -struct psb_gtt_mapping_arg { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct psb_gtt_mapping_arg { uint32_t type; void *hKernelMemInfo; uint32_t offset_pages; - uint32_t page_align; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t page_align; uint32_t bcd_device_id; uint32_t bcd_buffer_id; uint32_t bcd_buffer_count; - uint32_t bcd_buffer_stride; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ - uint32_t vaddr; + uint32_t bcd_buffer_stride; + unsigned long vaddr; uint32_t size; }; -struct drm_psb_getpageaddrs_arg { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct drm_psb_getpageaddrs_arg { uint64_t handle; uint64_t page_addrs; uint64_t gtt_offset; -}; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; #define MAX_SLICES_PER_PICTURE 72 struct psb_msvdx_mb_region { uint32_t start; - uint32_t end; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uint32_t end; }; typedef struct drm_psb_msvdx_decode_status { uint32_t num_region; - struct psb_msvdx_mb_region mb_regions[MAX_SLICES_PER_PICTURE]; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct psb_msvdx_mb_region mb_regions[MAX_SLICES_PER_PICTURE]; } drm_psb_msvdx_decode_status_t; enum { IDLE_CTRL_ENABLE = 0, - IDLE_CTRL_DISABLE, /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + IDLE_CTRL_DISABLE, IDLE_CTRL_ENTER, IDLE_CTRL_EXIT }; -struct drm_psb_idle_ctrl { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct drm_psb_idle_ctrl { uint32_t cmd; uint32_t value; }; -#define DRM_PSB_KMS_OFF 0x00 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_KMS_OFF 0x00 #define DRM_PSB_KMS_ON 0x01 #define DRM_PSB_VT_LEAVE 0x02 #define DRM_PSB_VT_ENTER 0x03 -#define DRM_PSB_EXTENSION 0x06 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_EXTENSION 0x06 #define DRM_PSB_SIZES 0x07 #define DRM_PSB_FUSE_REG 0x08 #define DRM_PSB_VBT 0x09 -#define DRM_PSB_DC_STATE 0x0A /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_DC_STATE 0x0A #define DRM_PSB_ADB 0x0B #define DRM_PSB_MODE_OPERATION 0x0C #define DRM_PSB_STOLEN_MEMORY 0x0D -#define DRM_PSB_REGISTER_RW 0x0E /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_REGISTER_RW 0x0E #define DRM_PSB_GTT_MAP 0x0F #define DRM_PSB_GTT_UNMAP 0x10 #define DRM_PSB_GETPAGEADDRS 0x11 -#define DRM_PVR_RESERVED1 0x12 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PVR_RESERVED1 0x12 #define DRM_PVR_RESERVED2 0x13 #define DRM_PVR_RESERVED3 0x14 #define DRM_PVR_RESERVED4 0x15 -#define DRM_PVR_RESERVED5 0x16 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PVR_RESERVED5 0x16 #define DRM_PSB_HIST_ENABLE 0x17 #define DRM_PSB_HIST_STATUS 0x18 #define DRM_PSB_UPDATE_GUARD 0x19 -#define DRM_PSB_INIT_COMM 0x1A /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_INIT_COMM 0x1A #define DRM_PSB_DPST 0x1B #define DRM_PSB_GAMMA 0x1C #define DRM_PSB_DPST_BL 0x1D -#define DRM_PVR_RESERVED6 0x1E /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PVR_RESERVED6 0x1E #define DRM_PSB_GET_PIPE_FROM_CRTC_ID 0x1F #define DRM_PSB_DPU_QUERY 0x20 #define DRM_PSB_DPU_DSR_ON 0x21 -#define DRM_PSB_DPU_DSR_OFF 0x22 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_DPU_DSR_OFF 0x22 #define DRM_PSB_HDMI_FB_CMD 0x23 #define DRM_PSB_QUERY_HDCP 0x24 #define DRM_PSB_VALIDATE_HDCP_KSV 0x25 -#define DRM_PSB_GET_HDCP_STATUS 0x26 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_GET_HDCP_STATUS 0x26 #define DRM_PSB_ENABLE_HDCP 0x27 #define DRM_PSB_DISABLE_HDCP 0x28 #define DRM_PSB_GET_HDCP_LINK_STATUS 0x2b -#define DRM_PSB_ENABLE_HDCP_REPEATER 0x2c /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_ENABLE_HDCP_REPEATER 0x2c #define DRM_PSB_DISABLE_HDCP_REPEATER 0x2d #define DRM_PSB_HDCP_REPEATER_PRESENT 0x2e #define DRM_PSB_CSC_GAMMA_SETTING 0x29 -#define DRM_PSB_SET_CSC 0x2a /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_SET_CSC 0x2a #define DRM_PSB_ENABLE_IED_SESSION 0x30 #define DRM_PSB_DISABLE_IED_SESSION 0x31 #define DRM_PSB_VSYNC_SET 0x32 -#define DRM_PSB_HDCP_DISPLAY_IED_OFF 0x33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_HDCP_DISPLAY_IED_OFF 0x33 #define DRM_PSB_HDCP_DISPLAY_IED_ON 0x34 #define DRM_PSB_QUERY_HDCP_DISPLAY_IED_CAPS 0x35 #define DRM_PSB_DPST_LEVEL 0x36 -#define DRM_PSB_GET_DC_INFO 0x37 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_GET_DC_INFO 0x37 #define DRM_PSB_PANEL_QUERY 0x38 #define DRM_PSB_IDLE_CTRL 0x39 #define DRM_PSB_HDMITEST 0x3A -#define HT_READ 1 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HT_READ 1 #define HT_WRITE 2 #define HT_FORCEON 4 typedef struct tagHDMITESTREGREADWRITE { - unsigned int reg; /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int reg; unsigned int data; int mode; } drm_psb_hdmireg_t, *drm_psb_hdmireg_p; -#define DRM_PSB_PANEL_ORIENTATION 0x3B /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_PANEL_ORIENTATION 0x3B #define DRM_PSB_UPDATE_CURSOR_POS 0x3C #define DRM_OEM_RESERVED_START 0x40 #define DRM_OEM_RESERVED_END 0x4F -#define DRM_PSB_TTM_START 0x50 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DRM_PSB_PANEL_SWITCH 0x100 +#define DRM_PSB_TTM_START 0x50 #define DRM_PSB_TTM_END 0x5F #ifdef PDUMP +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define DRM_PSB_CMDBUF (PVR_DRM_DBGDRV_CMD + 1) #else -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define DRM_PSB_CMDBUF (DRM_PSB_TTM_START) #endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define DRM_PSB_SCENE_UNREF (DRM_PSB_CMDBUF + 1) #define DRM_PSB_PLACEMENT_OFFSET (DRM_PSB_SCENE_UNREF + 1) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define DRM_PSB_DSR_ENABLE 0xfffffffe #define DRM_PSB_DSR_DISABLE 0xffffffff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct drm_psb_csc_matrix { int pipe; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int64_t matrix[9]; }__attribute__((packed)); +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct psb_drm_dpu_rect { int x, y; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int width, height; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct drm_psb_drv_dsr_off_arg { int screen; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct psb_drm_dpu_rect damage_rect; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct drm_psb_dev_info_arg { uint32_t num_use_attribute_registers; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; #define DRM_PSB_DEVINFO 0x01 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define PSB_MODE_OPERATION_MODE_VALID 0x01 #define PSB_MODE_OPERATION_SET_DC_BASE 0x02 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct drm_psb_get_pipe_from_crtc_id_arg { uint32_t crtc_id; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t pipe; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define DRM_PSB_DISP_SAVE_HDMI_FB_HANDLE 1 #define DRM_PSB_DISP_GET_HDMI_FB_HANDLE 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define DRM_PSB_DISP_INIT_HDMI_FLIP_CHAIN 1 #define DRM_PSB_DISP_QUEUE_BUFFER 2 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define DRM_PSB_DISP_DEQUEUE_BUFFER 3 #define DRM_PSB_DISP_PLANEB_DISABLE 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define DRM_PSB_DISP_PLANEB_ENABLE 5 #define DRM_PSB_HDMI_OSPM_ISLAND_DOWN 6 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define DRM_PSB_HDMI_NOTIFY_HOTPLUG_TO_AUDIO 7 typedef enum { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ GAMMA, CSC, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ GAMMA_INITIA, GAMMA_SETTING, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ GAMMA_REG_SETTING, CSC_INITIA, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CSC_CHROME_SETTING, CSC_SETTING, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ CSC_REG_SETTING } setting_type; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ typedef enum { GAMMA_05 = 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ GAMMA_20, GAMMA_05_20, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ GAMMA_20_05, GAMMA_10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } gamma_mode; #define CSC_REG_COUNT 6 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define CHROME_COUNT 16 #define CSC_COUNT 9 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct csc_setting { uint32_t pipe; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ setting_type type; bool enable_state; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t data_len; union { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int csc_reg_data[CSC_REG_COUNT]; int chrome_data[CHROME_COUNT]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ int64_t csc_data[CSC_COUNT]; } data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; -#define GAMMA_10_BIT_TABLE_COUNT 129 +#define GAMMA_10_BIT_TABLE_COUNT 132 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct gamma_setting { uint32_t pipe; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ setting_type type; bool enable_state; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ gamma_mode initia_mode; uint32_t data_len; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t gamma_tableX100[GAMMA_10_BIT_TABLE_COUNT]; }; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct drm_psb_csc_gamma_setting { setting_type type; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ union { struct csc_setting csc_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct gamma_setting gamma_data; } data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }__attribute__((packed)); struct drm_psb_buffer_data { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ void *h_buffer; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct drm_psb_flip_chain_data { void **h_buffer_array; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ unsigned int size; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct drm_psb_disp_ctrl { uint32_t cmd; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ union { uint32_t data; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct drm_psb_buffer_data buf_data; struct drm_psb_flip_chain_data flip_chain_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } u; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define S3D_MIPIA_DISPLAY 0 #define S3D_HDMI_DISPLAY 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define S3D_MIPIC_DISPLAY 2 #define S3D_WIDI_DISPLAY 0xFF -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct drm_psb_s3d_query { uint32_t s3d_display_type; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t is_s3d_supported; uint32_t s3d_format; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t mode_resolution_x; uint32_t mode_resolution_y; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t mode_refresh_rate; uint32_t is_interleaving; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ }; struct drm_psb_s3d_premodeset { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t s3d_buffer_format; }; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ typedef enum intel_dc_plane_types { DC_UNKNOWN_PLANE = 0, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DC_SPRITE_PLANE = 1, DC_OVERLAY_PLANE, -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DC_PRIMARY_PLANE, DC_CURSOR_PLANE, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ DC_PLANE_MAX, } DC_MRFLD_PLANE_TYPE; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define SPRITE_UPDATE_SURFACE (0x00000001UL) #define SPRITE_UPDATE_CONTROL (0x00000002UL) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define SPRITE_UPDATE_POSITION (0x00000004UL) #define SPRITE_UPDATE_SIZE (0x00000008UL) -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define SPRITE_UPDATE_WAIT_VBLANK (0X00000010UL) #define SPRITE_UPDATE_CONSTALPHA (0x00000020UL) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define SPRITE_UPDATE_ALL (0x0000003fUL) #define MRFLD_PRIMARY_COUNT 3 -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ typedef struct intel_dc_overlay_ctx { uint32_t index; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t pipe; uint32_t ovadd; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } DC_MRFLD_OVERLAY_CONTEXT; typedef struct intel_dc_cursor_ctx { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t index; uint32_t pipe; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t cntr; uint32_t surf; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t pos; } DC_MRFLD_CURSOR_CONTEXT; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ typedef struct intel_dc_sprite_ctx { uint32_t update_mask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t index; uint32_t pipe; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t cntr; uint32_t linoff; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t stride; uint32_t pos; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t size; uint32_t keyminval; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t keymask; uint32_t surf; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t keymaxval; uint32_t tileoff; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t contalpa; } DC_MRFLD_SPRITE_CONTEXT; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ typedef struct intel_dc_primary_ctx { uint32_t update_mask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t index; uint32_t pipe; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t cntr; uint32_t linoff; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t stride; uint32_t pos; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t size; uint32_t keyminval; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t keymask; uint32_t surf; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t keymaxval; uint32_t tileoff; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t contalpa; } DC_MRFLD_PRIMARY_CONTEXT; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ typedef struct intel_dc_plane_zorder { uint32_t forceBottom[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ uint32_t abovePrimary; } DC_MRFLD_DC_PLANE_ZORDER; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ typedef struct intel_dc_plane_ctx { enum intel_dc_plane_types type; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct intel_dc_plane_zorder zorder; + uint64_t gtt_key; union { -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct intel_dc_overlay_ctx ov_ctx; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ struct intel_dc_sprite_ctx sp_ctx; struct intel_dc_primary_ctx prim_ctx; struct intel_dc_cursor_ctx cs_ctx; -/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ } ctx; -} DC_MRFLD_SURF_CUSTOM; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +} __attribute__((packed)) DC_MRFLD_SURF_CUSTOM; #endif diff --git a/kernel-headers/linux/sound/intel_sst_ioctl.h b/kernel-headers/linux/sound/intel_sst_ioctl.h index 4c71ce3..40ffbf2 100644 --- a/kernel-headers/linux/sound/intel_sst_ioctl.h +++ b/kernel-headers/linux/sound/intel_sst_ioctl.h @@ -48,4 +48,3 @@ struct snd_sst_tuning_params { /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ #define SNDRV_SST_TUNING_PARAMS _IOW('L', 0x32, struct snd_sst_tuning_params) #endif - |
