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/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/of_irq.h>
#include <linux/memory.h>
#include <asm/mach/map.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/gic.h>
#include <asm/arch_timer.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <mach/socinfo.h>
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/clk-provider.h>
#include "clock.h"
#define L2CC_AUX_CTRL ((0x1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) | \
(0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | \
(0x1 << L2X0_AUX_CTRL_EVNT_MON_BUS_EN_SHIFT))
static struct clk_lookup msm_clocks_dummy[] = {
CLK_DUMMY("core_clk", BLSP1_UART_CLK, "msm_serial_hsl.0", OFF),
CLK_DUMMY("iface_clk", BLSP1_UART_CLK, "msm_serial_hsl.0", OFF),
CLK_DUMMY("phy_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("core_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("alt_core_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("iface_clk", NULL, "msm_otg", OFF),
CLK_DUMMY("xo", NULL, "msm_otg", OFF),
CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0),
CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, NULL, 0),
CLK_DUMMY("mem_clk", NULL, NULL, 0),
CLK_DUMMY("core_clk", SPI_CLK, "spi_qsd.1", OFF),
CLK_DUMMY("iface_clk", SPI_P_CLK, "spi_qsd.1", OFF),
CLK_DUMMY("core_clk", NULL, "f9966000.i2c", 0),
CLK_DUMMY("iface_clk", NULL, "f9966000.i2c", 0),
CLK_DUMMY("core_clk", NULL, "fe12f000.slim", OFF),
};
struct clock_init_data msm_dummy_clock_init_data __initdata = {
.table = msm_clocks_dummy,
.size = ARRAY_SIZE(msm_clocks_dummy),
};
static struct of_device_id irq_match[] __initdata = {
{ .compatible = "qcom,msm-qgic2", .data = gic_of_init, },
{ .compatible = "qcom,msm-gpio", .data = msm_gpio_of_init, },
{}
};
static const char *msm9625_dt_match[] __initconst = {
"qcom,msm9625",
NULL
};
static struct of_dev_auxdata msm9625_auxdata_lookup[] __initdata = {
OF_DEV_AUXDATA("qcom,msm-lsuart-v14", 0xF991F000, \
"msm_serial_hsl.0", NULL),
OF_DEV_AUXDATA("qcom,spi-qup-v2", 0xF9928000, \
"spi_qsd.1", NULL),
{}
};
void __init msm9625_init_irq(void)
{
l2x0_of_init(L2CC_AUX_CTRL, L2X0_AUX_CTRL_MASK);
of_irq_init(irq_match);
}
static void __init msm_dt_timer_init(void)
{
arch_timer_of_register();
}
static struct sys_timer msm_dt_timer = {
.init = msm_dt_timer_init
};
void __init msm9625_init(void)
{
if (socinfo_init() < 0)
pr_err("%s: socinfo_init() failed\n", __func__);
msm9625_init_gpiomux();
msm_clock_init(&msm_dummy_clock_init_data);
of_platform_populate(NULL, of_default_bus_match_table,
msm9625_auxdata_lookup, NULL);
}
DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
.map_io = msm_map_msm9625_io,
.init_irq = msm9625_init_irq,
.init_machine = msm9625_init,
.handle_irq = gic_handle_irq,
.timer = &msm_dt_timer,
.dt_compat = msm9625_dt_match,
.nr_irqs = -1,
MACHINE_END
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