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| author | Sarang Joshi <spjoshi@codeaurora.org> | 2013-12-13 14:19:48 -0800 |
|---|---|---|
| committer | Sarang Joshi <spjoshi@codeaurora.org> | 2014-02-18 23:27:02 -0800 |
| commit | 441ff248c2667338413eb7a7de15de9217fa88da (patch) | |
| tree | a5fb2cff3fb9d1cf41ae62463f34c462e7897f3b /scripts/build-all.py | |
| parent | 4db175e5666949f8c4654efbf5363b69d27bf5a9 (diff) | |
coresight: add device attribute for etr ddr mem size
Add device attribute to control ETR DDR memory size dynamically
for TMC configuration. This will help users to specify DDR trace
buffer size at runtime.
Change-Id: Ie1edef7f972435193c96dafb8a94fd6cce97ce6c
Signed-off-by: Sarang Joshi <spjoshi@codeaurora.org>
Diffstat (limited to 'scripts/build-all.py')
0 files changed, 0 insertions, 0 deletions