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| author | Subhash Jadavani <subhashj@codeaurora.org> | 2014-04-30 17:37:18 -0700 |
|---|---|---|
| committer | Subhash Jadavani <subhashj@codeaurora.org> | 2014-04-30 17:41:13 -0700 |
| commit | 6f8182218c4b1423d663f397106ec29122e3332f (patch) | |
| tree | 29a087ea31c843cbcba5064562a6146f4a049937 /scripts/build-all.py | |
| parent | ee794fa19068c1f09e40a462a59ad73734f894d8 (diff) | |
scsi: ufs-msm: disable the sigdet before power collapsing PHY
If UFS PHY power down is deasserted and power is restored to analog
circuits, the rx_sigdet can glitch. If the glitch is wide enough,
it can trigger the PHY digital logic to think it saw a DIF-N and
cause it to exit Hibern8. Disabling the rx_sigdet during power-up
will mask the glitch.
Change-Id: I20d93d2f5b479bb9e1d9626cfb9939d280b172a5
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Diffstat (limited to 'scripts/build-all.py')
0 files changed, 0 insertions, 0 deletions