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| author | Sameer Thalappil <sameert@codeaurora.org> | 2013-09-12 11:30:06 -0700 |
|---|---|---|
| committer | Sameer Thalappil <sameert@codeaurora.org> | 2013-09-12 11:56:37 -0700 |
| commit | 91945466244408bcd127a17c5db158ae8ba2955c (patch) | |
| tree | 9f9d97e15e5319ea1bb985ef25f3b8c936d3a5e4 /scripts/build-all.py | |
| parent | a9544cf699ab1d3ba3c5490408a5b050f81b757e (diff) | |
wcnss: Fix AXIM select and CTRL select bit fields
When a WDI timeout happens, WLAN driver will initiate SSR. Dumping
these registers before performing the reset helps to debug the root
cause of the timeout. Fix AXIM select and CTRL select bit fields
of testbus register while doing the A2XB testbus register dump.
Change-Id: Ic9c7ddf2e4cee07b43cc8fe06afca04755856eeb
CRs-Fixed: 540586
Signed-off-by: Sameer Thalappil <sameert@codeaurora.org>
Diffstat (limited to 'scripts/build-all.py')
0 files changed, 0 insertions, 0 deletions