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authorGirish Mahadevan <girishm@codeaurora.org>2014-03-03 10:47:31 -0700
committerAlok Chauhan <alokc@codeaurora.org>2014-03-12 18:53:51 +0530
commitffad5c98c54ecda782c4ed5b950a8639d94b1878 (patch)
treeeea080a7a1ab20590970d651a9c32fbfd5acc404 /scripts/build-all.py
parentc34a952b82fe34362a606872573aef23978b523f (diff)
msm: msm_bus: Add bus clock aggregation
Bus clocks need to be aggregated at the entire topology level after the aggregation at the node level during a transaction. This is because bus driver has a single clock handle for each of its bus clocks and must not assume any aggregation at the clock driver. Change-Id: I2cc69ba71e611aee67e538db5e7134c52a439fa4 Signed-off-by: Girish Mahadevan <girishm@codeaurora.org> Signed-off-by: Alok Chauhan <alokc@codeaurora.org>
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