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authorPrasad Sodagudi <psodagud@codeaurora.org>2014-03-10 14:53:15 -0700
committerAnji Jonnala <anjir@codeaurora.org>2014-03-13 00:02:14 +0530
commitc867a83c64db4b69e0a851b02d8f8355c14347f4 (patch)
tree7adc6586965a0364e43e79b0e692ae1abc63e8fe /scripts/gcc-wrapper.py
parenta75196f542d2e3a0e3177e19caf2c970cdbd1946 (diff)
qcom: msm-pm: fix bug in finding whether cache is WT or WB
Bit 30 in Cache size ID register indicates write back cache for ARMV8 architecture. Fix the bug to use bit30 in finding writeback cache. Change-Id: I40b0325ee5c286e2704f530a618c0b7d249a6d50 Signed-off-by: Anji Jonnala <anjir@codeaurora.org>
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