aboutsummaryrefslogtreecommitdiff
path: root/drivers/platform/msm/spss.c
blob: ac645b2f8cf013960755908ac4335d3a640f2f38 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#define pr_fmt(fmt) "%s: " fmt, __func__

#include <linux/clk.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <mach/msm_iomap.h>

#define CLOCK_CONTROL_REG      0x00
#define BUS_SMCBC_REG          0x04
#define PSCBC_BUS_REG          0x0C
#define PSCBC_GENI_REG         0x10

#define STANDBY_MODE            0x2
#define ACTIVE_MODE             0x1

#define ASYNC_SW_CLK_EN         0x2

struct msm_spss_dev_t {
	void __iomem		  *base;
	struct clk                *clk;
};

static struct msm_spss_dev_t msm_spss_dev;

static int msm_spss_probe(struct platform_device *pdev)
{
	struct resource *res;
	int rc = 0;

	msm_spss_dev.clk = clk_get(&pdev->dev, "iface_clk");
	if (IS_ERR(msm_spss_dev.clk)) {
		rc = PTR_ERR(msm_spss_dev.clk);
		dev_err(&pdev->dev, "could not get ahb clk %d\n", rc);
		goto err_clk_get;
	}

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "base");
	if (!res) {
		dev_err(&pdev->dev, "missing memory resource\n");
		rc = -EINVAL;
		goto err_res;
	}

	msm_spss_dev.base = ioremap(res->start, resource_size(res));
	if (!msm_spss_dev.base) {
		dev_err(&pdev->dev, "ioremap failed\n");
		rc = -ENOMEM;
		goto err_ioremap;
	}

	rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
	if (rc) {
		dev_err(&pdev->dev, "of_platform_populate failed %d\n", rc);
		goto err_of_plat_pop;
	}

	rc = clk_prepare_enable(msm_spss_dev.clk);
	if (rc) {
		dev_err(&pdev->dev, "ahb clk enable failed %d\n", rc);
		goto err_clk_en;
	}

	writel_relaxed(ASYNC_SW_CLK_EN, (msm_spss_dev.base + BUS_SMCBC_REG));
	writel_relaxed(ASYNC_SW_CLK_EN, (msm_spss_dev.base + PSCBC_BUS_REG));
	writel_relaxed(ASYNC_SW_CLK_EN, (msm_spss_dev.base + PSCBC_GENI_REG));

	clk_disable_unprepare(msm_spss_dev.clk);

	return 0;

err_clk_en:
err_of_plat_pop:
	iounmap(msm_spss_dev.base);
err_ioremap:
err_res:
	clk_put(msm_spss_dev.clk);
err_clk_get:
	return rc;
}

static int __exit msm_spss_remove(struct platform_device *pdev)
{
	if (msm_spss_dev.base)
		iounmap(msm_spss_dev.base);

	if (msm_spss_dev.clk)
		clk_put(msm_spss_dev.clk);

	return 0;
}

#ifdef CONFIG_PM_SLEEP
static int msm_spss_suspend(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	int rc;
	u32 val;

	rc = clk_prepare_enable(msm_spss_dev.clk);
	if (rc) {
		dev_err(&pdev->dev, "ahb clk enable failed %d\n", rc);
		return rc;
	}

	val = readl_relaxed(msm_spss_dev.base + CLOCK_CONTROL_REG);
	val &= ~ACTIVE_MODE;
	val |= STANDBY_MODE;
	writel_relaxed(val, (msm_spss_dev.base + CLOCK_CONTROL_REG));
	wmb();

	clk_disable_unprepare(msm_spss_dev.clk);
	return 0;
}

static int msm_spss_resume(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	int rc;
	u32 val;

	rc = clk_prepare_enable(msm_spss_dev.clk);
	if (rc) {
		dev_err(&pdev->dev, "ahb clk enable failed %d\n", rc);
		return rc;
	}

	val = readl_relaxed(msm_spss_dev.base + CLOCK_CONTROL_REG);
	val &= ~STANDBY_MODE;
	val |= ACTIVE_MODE;
	writel_relaxed(val, (msm_spss_dev.base + CLOCK_CONTROL_REG));
	wmb();

	clk_disable_unprepare(msm_spss_dev.clk);
	return 0;
}
#endif /* CONFIG_PM_SLEEP */

static const struct dev_pm_ops msm_spss_dev_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(
		msm_spss_suspend,
		msm_spss_resume
	)
};

static struct of_device_id msm_spss_match[] = {
	{	.compatible = "qcom,msm-spss",
	},
	{}
};

static struct platform_driver msm_spss_driver = {
	.probe	= msm_spss_probe,
	.remove	= msm_spss_remove,
	.driver	= {
		.name		= "msm_spss",
		.owner		= THIS_MODULE,
		.pm		= &msm_spss_dev_pm_ops,
		.of_match_table	= msm_spss_match,
	},
};

static int __init spss_init(void)
{
	return platform_driver_register(&msm_spss_driver);
}

static void __exit spss_exit(void)
{
	platform_driver_unregister(&msm_spss_driver);
}

module_init(spss_init);
module_exit(spss_exit);

MODULE_LICENSE("GPL v2");