1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
|
#ifndef __MSM_ADC_H
#define __MSM_ADC_H
#include <linux/sched.h>
#define MSM_ADC_MAX_CHAN_STR 64
#define MSM_ADC_DEV_MAX_INFLIGHT 9
#define MSM_ADC_IOCTL_CODE 0x90
struct msm_adc_conversion {
uint32_t chan;
int result;
};
struct adc_chan_result {
uint32_t chan;
int32_t adc_code;
int64_t measurement;
int64_t physical;
};
#define MSM_ADC_REQUEST _IOWR(MSM_ADC_IOCTL_CODE, 1, \
struct adc_chan_result)
#define MSM_ADC_AIO_REQUEST _IOWR(MSM_ADC_IOCTL_CODE, 2, \
struct adc_chan_result)
#define MSM_ADC_AIO_REQUEST_BLOCK_RES _IOWR(MSM_ADC_IOCTL_CODE, 3, \
struct adc_chan_result)
#define MSM_ADC_AIO_POLL _IOR(MSM_ADC_IOCTL_CODE, 4, \
uint32_t)
#define MSM_ADC_FLUID_INIT _IOR(MSM_ADC_IOCTL_CODE, 5, \
uint32_t)
#define MSM_ADC_FLUID_DEINIT _IOR(MSM_ADC_IOCTL_CODE, 6, \
uint32_t)
struct msm_adc_aio_result {
uint32_t chan;
int result;
};
#define MSM_ADC_AIO_READ _IOR(MSM_ADC_IOCTL_CODE, 5, \
struct adc_chan_result)
struct msm_adc_lookup {
char name[MSM_ADC_MAX_CHAN_STR];
uint32_t chan_idx;
};
#define MSM_ADC_LOOKUP _IOWR(MSM_ADC_IOCTL_CODE, 6, \
struct msm_adc_lookup)
#ifdef __KERNEL__
#define MSM_ADC_MAX_NUM_DEVS 3
enum {
ADC_CONFIG_TYPE1,
ADC_CONFIG_TYPE2,
ADC_CONFIG_NONE = 0xffffffff
};
enum {
ADC_CALIB_CONFIG_TYPE1,
ADC_CALIB_CONFIG_TYPE2,
ADC_CALIB_CONFIG_TYPE3,
ADC_CALIB_CONFIG_TYPE4,
ADC_CALIB_CONFIG_TYPE5,
ADC_CALIB_CONFIG_TYPE6,
ADC_CALIB_CONFIG_TYPE7,
ADC_CALIB_CONFIG_NONE = 0xffffffff
};
enum {
CHAN_PATH_TYPE1,
CHAN_PATH_TYPE2,
CHAN_PATH_TYPE3,
CHAN_PATH_TYPE4,
CHAN_PATH_TYPE5,
CHAN_PATH_TYPE6,
CHAN_PATH_TYPE7,
CHAN_PATH_TYPE8,
CHAN_PATH_TYPE9,
CHAN_PATH_TYPE10,
CHAN_PATH_TYPE11,
CHAN_PATH_TYPE12,
CHAN_PATH_TYPE13,
CHAN_PATH_TYPE14,
CHAN_PATH_TYPE15,
CHAN_PATH_TYPE16,
CHAN_PATH_TYPE_NONE = 0xffffffff
};
#define CHANNEL_ADC_BATT_ID 0
#define CHANNEL_ADC_BATT_THERM 1
#define CHANNEL_ADC_BATT_AMON 2
#define CHANNEL_ADC_VBATT 3
#define CHANNEL_ADC_VCOIN 4
#define CHANNEL_ADC_VCHG 5
#define CHANNEL_ADC_CHG_MONITOR 6
#define CHANNEL_ADC_VPH_PWR 7
#define CHANNEL_ADC_USB_VBUS 8
#define CHANNEL_ADC_DIE_TEMP 9
#define CHANNEL_ADC_DIE_TEMP_4K 0xa
#define CHANNEL_ADC_XOTHERM 0xb
#define CHANNEL_ADC_XOTHERM_4K 0xc
#define CHANNEL_ADC_HDSET 0xd
#define CHANNEL_ADC_MSM_THERM 0xe
#define CHANNEL_ADC_625_REF 0xf
#define CHANNEL_ADC_1250_REF 0x10
#define CHANNEL_ADC_325_REF 0x11
#define CHANNEL_ADC_FSM_THERM 0x12
#define CHANNEL_ADC_PA_THERM 0x13
enum {
CALIB_STARTED,
CALIB_NOT_REQUIRED = 0xffffffff,
};
struct linear_graph {
int32_t offset;
int32_t dy;
int32_t dx;
};
struct adc_map_pt {
int32_t x;
int32_t y;
};
struct adc_properties {
uint32_t adc_reference;
uint32_t bitresolution;
bool bipolar;
uint32_t conversiontime;
};
struct chan_properties {
uint32_t gain_numerator;
uint32_t gain_denominator;
struct linear_graph *adc_graph;
uint32_t chan_conv_time;
};
struct msm_adc_channels {
char *name;
uint32_t channel_name;
uint32_t adc_dev_instance;
struct adc_access_fn *adc_access_fn;
uint32_t chan_path_type;
uint32_t adc_config_type;
uint32_t adc_calib_type;
int32_t (*chan_processor)(int32_t, const struct adc_properties *,
const struct chan_properties *, struct adc_chan_result *);
};
struct msm_adc_platform_data {
struct msm_adc_channels *channel;
uint32_t num_chan_supported;
uint32_t num_adc;
uint32_t chan_per_adc;
char **dev_names;
uint32_t target_hw;
uint32_t gpio_config;
u32 (*adc_gpio_enable) (int);
u32 (*adc_gpio_disable) (int);
u32 (*adc_fluid_enable) (void);
u32 (*adc_fluid_disable) (void);
};
enum hw_type {
MSM_7x30,
MSM_8x60,
FSM_9xxx,
MSM_8x25,
};
enum epm_gpio_config {
MPROC_CONFIG,
APROC_CONFIG
};
enum adc_request {
START_OF_CONV,
END_OF_CONV,
START_OF_CALIBRATION,
END_OF_CALIBRATION,
};
struct adc_dev_spec {
uint32_t hwmon_dev_idx;
struct dal_dev_spec {
uint32_t dev_idx;
uint32_t chan_idx;
} dal;
};
struct dal_conv_request {
struct dal_dev_spec target;
void *cb_h;
};
struct dal_adc_result {
uint32_t status;
uint32_t token;
uint32_t dev_idx;
uint32_t chan_idx;
int physical;
uint32_t percent;
uint32_t microvolts;
uint32_t reserved;
};
struct dal_conv_slot {
void *cb_h;
struct dal_adc_result result;
struct completion comp;
struct list_head list;
uint32_t idx;
uint32_t chan_idx;
bool blocking;
struct msm_client_data *client;
};
struct dal_translation {
uint32_t dal_dev_idx;
uint32_t hwmon_dev_idx;
uint32_t hwmon_start;
uint32_t hwmon_end;
};
struct msm_client_data {
struct list_head complete_list;
bool online;
int32_t adc_chan;
uint32_t num_complete;
uint32_t num_outstanding;
wait_queue_head_t data_wait;
wait_queue_head_t outst_wait;
struct mutex lock;
};
struct adc_conv_slot {
void *cb_h;
union {
struct adc_chan_result result;
struct dal_adc_result dal_result;
} conv;
struct completion comp;
struct completion *compk;
struct list_head list;
uint32_t idx;
enum adc_request adc_request;
bool blocking;
struct msm_client_data *client;
struct work_struct work;
struct chan_properties chan_properties;
uint32_t chan_path;
uint32_t chan_adc_config;
uint32_t chan_adc_calib;
};
struct adc_access_fn {
int32_t (*adc_select_chan_and_start_conv)(uint32_t,
struct adc_conv_slot*);
int32_t (*adc_read_adc_code)(uint32_t dev_instance, int32_t *data);
struct adc_properties *(*adc_get_properties)(uint32_t dev_instance);
void (*adc_slot_request)(uint32_t dev_instance,
struct adc_conv_slot **);
void (*adc_restore_slot)(uint32_t dev_instance,
struct adc_conv_slot *slot);
int32_t (*adc_calibrate)(uint32_t dev_instance, struct adc_conv_slot*,
int *);
};
void msm_adc_wq_work(struct work_struct *work);
void msm_adc_conv_cb(void *context, u32 param, void *evt_buf, u32 len);
#ifdef CONFIG_SENSORS_MSM_ADC
int32_t adc_channel_open(uint32_t channel, void **h);
int32_t adc_channel_close(void *h);
int32_t adc_channel_request_conv(void *h, struct completion *conv_complete_evt);
int32_t adc_channel_read_result(void *h, struct adc_chan_result *chan_result);
#else
static inline int32_t adc_channel_open(uint32_t channel, void **h)
{
pr_err("%s.not supported.\n", __func__);
return -ENODEV;
}
static inline int32_t adc_channel_close(void *h)
{
pr_err("%s.not supported.\n", __func__);
return -ENODEV;
}
static inline int32_t
adc_channel_request_conv(void *h, struct completion *conv_complete_evt)
{
pr_err("%s.not supported.\n", __func__);
return -ENODEV;
}
static inline int32_t
adc_channel_read_result(void *h, struct adc_chan_result *chan_result)
{
pr_err("%s.not supported.\n", __func__);
return -ENODEV;
}
#endif
#endif
#endif
|