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authorSultan Alsawaf <sultan@kerneltoast.com>2022-06-01 23:21:08 -0700
committerKitsunejasutin <justineryandeguia@yahoo.com>2022-07-17 20:08:08 +0800
commitd30789b448597d221c5c6163aa63f5c9cd61214f (patch)
tree4304dfec98f7d5a595d15c5867240199832a7532 /scripts/stackusage
parent2384c4764ac9fb6357c1f859269f200e6dcd15b1 (diff)
memlat: Read perf counters in parallel and reduce system jitterHEADs12.1
Sending synchronous IPIs to other CPUs involves spinning with preemption disabled in order to wait for each IPI to finish. Keeping preemption off for long periods of time like this is bad for system jitter, not to mention the perf event IPIs are sent and flushed one at a time for each event for each CPU rather than all at once for all the CPUs. Since the way perf events are currently read is quite naive, rewrite it to make it exploit parallelism and go much faster. IPIs for reading each perf event are now sent to all CPUs asynchronously so that each CPU can work on reading the events in parallel, and the dispatching CPU now sleeps rather than spins when waiting for the IPIs to finish. Before the dispatching CPU starts waiting though, it works on reading events for itself and then reading events which can be read from any CPU in order to derive further parallelism, and then waits for the IPIs to finish afterwards if they haven't already. Furthermore, there's now only one IPI sent to read all of a CPU's events rather than an IPI sent for reading each event, which significantly speeds up the event reads and reduces the number of IPIs sent. This also checks for active SCM calls on a per-CPU basis rather than a global basis so that unrelated CPUs don't get their counter reads skipped and so that some CPUs can still receive fresh counter readings. Overall, this makes the memlat driver much faster and more efficient, and eliminates significant system jitter previously caused by IPI abuse. Signed-off-by: Sultan Alsawaf <sultan@kerneltoast.com> Signed-off-by: Adithya R <gh0strider.2k18.reborn@gmail.com>
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