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* dalvik: Disable loop hoisting optimization on perf buildsSteve Kondik2014-05-081-0/+4
| | | | | | * Fixes VSCO Cam array traversal crash when perf is enabled. Change-Id: I57e59e407a538c4cc48972f4cf3167c505d7ded4
* Merge "Revert "Revert "Initialize callTgt variable""" into kitkatDavor Bertovic2014-04-011-1/+1
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| * Revert "Revert "Initialize callTgt variable""Davor Bertovic2014-04-011-1/+1
| | | | | | | | | | | | This reverts commit 5d1ce32a68a9d4e8eaef82ce7e5362d583604a24. Change-Id: Ibc369bee8d9ab982bbf527f74ad0998255125f3e
* | Merge "Revert "Initialize callTgt variable"" into kitkatDavor Bertovic2014-03-301-1/+1
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| * Revert "Initialize callTgt variable"Davor Bertovic2014-03-301-1/+1
| | | | | | | | | | | | This reverts commit 2ad51eaac2ce87c15593269ad842763bd4dc4da9. Change-Id: I8163b2af3e5082b184f495e1e30e29193d4fde7a
* | dalvik: add placeholder for future changesWei Wang2014-03-281-1/+2
|/ | | | | | add placeholder for future changes Change-Id: I09dd704a60857de71cafd7e6b64ee750c5cb95b1
* Initialize callTgt variableBernhard Rosenkränzer2014-03-281-1/+1
| | | | | | | | | | | | This silcences a clang build failure: dalvik/vm/compiler/codegen/arm/armv7-a-neon/../CodegenDriver.cpp:904:41: error: variable 'callTgt' is uninitialized when used here [-Werror,-Wuninitialized] LOAD_FUNC_ADDR(cUnit, r2, (int) callTgt); ^~~~~~~ Change-Id: Ic5b3bb492f19b842743bf7d6214c89301ff524e7 Signed-off-by: Bernhard Rosenkränzer <Bernhard.Rosenkranzer@linaro.org>
* vm: Enable fast multiply on perf builds tooSteve Kondik2014-03-245-13/+2
| | | | Change-Id: I74d152ea9cfe5b15daa9a8353ca27d8afa7474d2
* Dalvik: DMB Optimisations for TracingJITDavid Butcher2013-12-182-9/+9
| | | | | | | | Makes DMB domain ISH or ISHST instead of the implicit System. ISH (Inner Shareable) should be sufficient for all cores/clusters, but is not sufficient for GPU or other memory-mapped peripherals Change-Id: Id159228daba97bc3692d2eb1ee2786bae2ee34a7
* Merge branch 'kk_2.7_rb1.11' of git://codeaurora.org/platform/dalvik into ↵Steve Kondik2013-11-301-5/+11
|\ | | | | | | cm-11.0
| * dalvik: use T3 branch when target offset is too largeWei Wang2013-11-191-5/+11
| | | | | | | | | | | | | | | | T1 branch has offset limit of [-256, 254]. T3 branch has offset limit of [-1048576, 1048574]. Use T3 branch when target offset falls outside T1 range to avoid compiliation abort. Change-Id: I86809e08236b1f5f5102e3fce4df4b1e72e4b96c
* | Merge branch 'kk_2.7_rb1.9' of git://codeaurora.org/platform/dalvik into cafSteve Kondik2013-11-1112-133/+888
|\| | | | | | | Change-Id: I885fab2470352d0a625c9946d0d5c9111486b713
| * dalvik: dalvik device extension pack.Xin Qi2013-10-3113-134/+563
| | | | | | | | | | | | | | | | | | Add support for customer device extension Change-Id: I0402a630ba212d1c5e81cda110f61210f7b60384 (cherry picked from commit 11499df326462bfe25890a35c6abbf019ff7784e) (cherry picked from commit e03b8f8da9cf4eef64cedf39ce9ca90d26ce5124) (cherry picked from commit fb360be406f35b9591f12c61936657f03cc5880f)
* | Merge tag 'android-4.4_r1' into cm-11.0Ricardo Cerqueira2013-11-0111-14/+59
|\| | | | | | | Android 4.4 Release 1.0
| * am bbd903de: am 28702c58: am ae2fb913: Merge "JIT: Use rsb and shift in easy ↵Elliott Hughes2013-06-175-4/+23
| |\ | | | | | | | | | | | | | | | | | | multiply." * commit 'bbd903dec7c25859849fa447aaeef365f20440d4': JIT: Use rsb and shift in easy multiply.
| | * JIT: Use rsb and shift in easy multiply.Anders O Nilsson2013-06-145-4/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For easy multiplication using reverse subtract (when lit is 2^n-1) use the barrel shifter for rsb. This improves arithmetic performance for code executing in Dalvik. E.g String.hashCode. Change-Id: Ifb086dcec344b30fd3e392ac21d508b43e820cdc Signed-off-by: Patrik Ryd <patrik.ryd@stericsson.com>
| * | am 15139109: am 6529809b: Merge "JIT: Allow use of cbz/cbnz for conditional ↵Elliott Hughes2013-06-131-4/+2
| |\| | | | | | | | | | | | | | | | | | | branch gen." * commit '151391097e94585d4dd062098438e5c894b98d6d': JIT: Allow use of cbz/cbnz for conditional branch gen.
| | * Merge "JIT: Allow use of cbz/cbnz for conditional branch gen."Elliott Hughes2013-06-131-4/+2
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| | | * JIT: Allow use of cbz/cbnz for conditional branch gen.Anders O Nilsson2013-04-181-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimize conditional branch generation when comparing with zero for ARM JIT. When possible use cbz/cbnz instead of cmp+beq/cmp+bne. This improves performance for usecases involving code execution in Dalvik. Change-Id: I8f7c44c87eb73d4da00a48fd86220a62cb0515f5 Signed-off-by: Patrik Ryd <patrik.ryd@stericsson.com>
| * | | am de241376: am 91027c67: Merge "Remove unused compiler templates for armv7-a*"Elliott Hughes2013-06-054-6/+6
| |\| | | | | | | | | | | | | | | | | | * commit 'de2413762e3626039cadf270479f30dea6307fe8': Remove unused compiler templates for armv7-a*
| | * | Merge "Remove unused compiler templates for armv7-a*"Elliott Hughes2013-06-054-6/+6
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| | | * | Remove unused compiler templates for armv7-a*You Kim2013-05-174-6/+6
| | | |/ | | | | | | | | | | | | Change-Id: I68e344c2f2689347d6eeb943030b7263a55cd0bd
| | * / Fix JIT bug related to immediate doublesbuzbee2013-04-261-1/+2
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change 256211 (JIT: Performance Fix for const doubles) introduced a defect that can cause the JIT to use the wrong floating point double constant in traces in which the following conditions hold: o Two (or more) different 64-bit floating point constants are used. o The physical register holding the first constant is still live at the time the second constant is used. o The low 32 bits of the two constants are identical. In this situation, the load/copy optimization pass will incorrectly determine that the two constants are the same, delete the load of the second constant and re-use the first constant value. Note: this problem only occurs with 64-bit floating point literals. 64-bit long literals are unaffected. This CL works around the problem, and a subsequent CL will rework disambiguation of 64-bit immediates in a somewhat cleaner fashion. (cherry-pick of c1757a6deab0ca0bfd42c38612d92b2f26c41dbe.) Change-Id: I795b4b753550d2745cbbdd83ae25f4a7088990f6
| * | JIT tuning; set cache size on command linebuzbee2013-05-235-4/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tuning knobs for triggering trace compilation for the JIT had not been revisited for several years. In that time, the working set of some applications have significantly increased, leading to frequent cache overlows & flushes. This CL adds the ability to set the maximum size of the JIT's cache on the command line, and we expect to use different settings depending on device configuration (rule of thumb: 1K for each 1M for system RAM, with 2M limit). Additionally, the trace compilation trigger has been tightened to limit the compilation of cold traces. Change-Id: Ice22c5d9d46a93e465c57dd83f50ca3912f1672e
* | | Revert "Move verification of class access flags to libdex"Ricardo Cerqueira2013-11-016-317/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit aa897b06230453519c4ec636f229c72ac0015897. Revert "Reject dex files that attempt to use unspecified class access flags" This reverts commit 2f824d3e4835479409724ea02d0a23114cd4ff81. Revert "If dalvik wants ASCII casing, it needs to ask for it." This reverts commit d91250308fc4c423d11955174c21566fa19df07c. Revert "JIT: Combine add with shift and offset for array load & store." This reverts commit a9ecd84e5f5423a1ba6bbb2bb9256b0dc382de44. Revert "JIT: Use rsb and shift in easy multiply." This reverts commit 25b94295a57290623e34882e7fd86ea10928a54e. Revert "Excessive JNI: Dump HPROF dump." This reverts commit 8d30a7402d48c4ffe2bf28ede78c6b3b52b15304. Revert "dalvik/vm: Dalvik startup with a low memory footprint" This reverts commit 15726c81059b74bf2352db29a3decfc4ea9c1428.
* | | JIT: Combine add with shift and offset for array load & store.Anders O Nilsson2013-07-244-143/+294
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimize long and double array load / store for ARM JIT. Array load / store performs a logical shift left and add, replace it with add capable of performing shift in the same instruction. Array load / store performs an add instead of using offset for vldr/vstr. Replace the add and vldr/vstr with a vldr/vstr that is capable of handling offset. This improves performance for usecases involving long and double array code execution in Dalvik. E.g WindowOrientation. Change-Id: I90220c349ab936cdba1987139ccdf4dc31d7bbb0 Signed-off-by: Patrik Ryd <patrik.ryd@stericsson.com>
* | | JIT: Combine add with shift.Anders O Nilsson2013-07-241-0/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimize logical shift for ARM JIT. Whenever logical shift is followed by an add, try to replace it with an add capable of performing the shift in the same instruction. This improves performance for usecases involving code executing in Dalvik. Change-Id: I3cb807b6d6ef4b053a19e2703676a93a930eb963 Signed-off-by: Patrik Ryd <patrik.ryd@stericsson.com>
* | | JIT: Hoist loop load operations above loop.Henrik Smiding2013-07-242-1/+210
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hoists Dalvik frame load operations outside of loops, when possible. This improves performance in most loops, and is noticable in many applications. Change-Id: Ibe42b509b50a13f19758fd923f31d703e33a51c6 Signed-off-by: Henrik Smiding <henrik.smiding@stericsson.com> Signed-off-by: Patrik Ryd <patrik.ryd@stericsson.com>
* | | JIT: Use rsb and shift in easy multiply.Anders O Nilsson2013-07-245-4/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For easy multiplication using reverse subtract (when lit is 2^n-1) use the barrel shifter for rsb. This improves arithmetic performance for code executing in Dalvik. E.g String.hashCode. Change-Id: Ifb086dcec344b30fd3e392ac21d508b43e820cdc Signed-off-by: Patrik Ryd <patrik.ryd@stericsson.com>
* | | JIT: Combine shift & sub for monitor unlock.Anders O Nilsson2013-07-241-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimize monitor unlock for ARM Thumb2 JIT. Monitor unlock performs a logical shift left and sub, replace it with a sub capable of performing the shift in the same instruction. This improves performance for usecases involving code executing in Dalvik. Change-Id: Iaf062d750c3bc941926f3c3b8a64dc9c7984a477 Signed-off-by: Patrik Ryd <patrik.ryd@stericsson.com>
* | | JIT: Allow use of cbz/cbnz for conditional branch gen.Anders O Nilsson2013-07-241-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimize conditional branch generation when comparing with zero for ARM JIT. When possible use cbz/cbnz instead of cmp+beq/cmp+bne. This improves performance for usecases involving code execution in Dalvik. Change-Id: Iffd455d9cbb3ef0b1f87caafdae1b72ba3f0d2fc Signed-off-by: Patrik Ryd <patrik.ryd@stericsson.com>
* | | dalvik: Update ARMv6 code to compile and bring in line with ARMv5Lalit Maganti2013-07-242-4/+4
| | | | | | | | | | | | Change-Id: I2764002422ade74db602cc2292108ed67241f0be
* | | ThumbVFP.cpp:231:10: error: variable 'wide' set but not used ↵Android Meda2013-07-241-3/+0
| | | | | | | | | | | | | | | | | | [-Werror=unused-but-set-variable] Change-Id: If6828c8cf8c2c4ab28567f6e39126e537d0020c1
* | | dalvik: fix a bug in redundant branch eliminationWei Wang2013-07-241-1/+1
| | |
* | | Add support for ARMv6J and ARMv6-VFP processor targetArne Coucheron2013-07-2410-2/+472
|/ / | | | | | | Merged in code from gingerbread branch with updated code in ics.
* | am 6e2d46fd: am 03a938bc: Merge "Fix -Xjitthreshold (for real this time)."Elliott Hughes2013-03-014-4/+4
|\| | | | | | | | | * commit '6e2d46fd7488331181502a878959336966ac3776': Fix -Xjitthreshold (for real this time).
| * Fix -Xjitthreshold (for real this time).Elliott Hughes2013-03-014-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | My previous "fix" (c89d83e1c05979b68037ad15413fa4460a88e36f) had the conditions reversed, so you _had_ to use -Xjitthreshold to get a non-zero threshold, but when you did, you'd get the default instead of what you asked for! This was spotted by the jank tests. Bug: 8285558 Bug: https://code.google.com/p/android/issues/detail?id=52017 Change-Id: I28270f2573d46929eb10d30789fecf7d5a8cea75
* | am 7f77254e: Merge "Fix -Xjitthreshold."Elliott Hughes2013-02-264-4/+12
|\| | | | | | | | | * commit '7f77254e7ba273c18bd77313c6074029d3f79f79': Fix -Xjitthreshold.
| * Fix -Xjitthreshold.Elliott Hughes2013-02-254-4/+12
| | | | | | | | | | | | | | | | Previously, we'd always overwrite the user-supplied value because the architecture-specific default gets set so late. Bug: https://code.google.com/p/android/issues/detail?id=52017 Change-Id: I469bf9ce599820f5ce3dea346aa8f680deffb0c5
| * JIT: Performance fix for const doublesbuzbee2012-11-303-5/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | Some recent Arm processors take a performance hit when creating a floating point double by loading it as a pair of singles. Legacy code to support soft floating point doubles as a pair of core registers loaded double immediates in this way. With the CL, we handle double immediates as a single unit. (cherry-pick of c8129911e598ad0ca8d7b31012444ab6ce8bce45.) Change-Id: Ic1512e34bfd233a6f5ffd58ce843965adbbad875
* | Fix JIT bug related to immediate doublesbuzbee2013-02-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change 256211 (JIT: Performance Fix for const doubles) introduced a defect that can cause the JIT to use the wrong floating point double constant in traces in which the following conditions hold: o Two (or more) different 64-bit floating point constants are used. o The physical register holding the first constant is still live at the time the second constant is used. o The low 32 bits of the two constants are identical. In this situation, the load/copy optimization pass will incorrectly determine that the two constants are the same, delete the load of the second constant and re-use the first constant value. Note: this problem only occurs with 64-bit floating point literals. 64-bit long literals are unaffected. This CL works around the problem, and a subsequent CL will rework disambiguation of 64-bit immediates in a somewhat cleaner fashion. Change-Id: I33baf78402bab58d9b0ca46189f26491c2b2a751
* | JIT: Performance fix for const doublesbuzbee2012-11-303-5/+65
|/ | | | | | | | | | | Some recent Arm processors take a performance hit when creating a floating point double by loading it as a pair of singles. Legacy code to support soft floating point doubles as a pair of core registers loaded double immediates in this way. With the CL, we handle double immediates as a single unit. Change-Id: I91aca9da6d4b38e180479dd8f75c82dbc7b4a526
* Don't disable inlining for ARM.Elliott Hughes2012-10-091-0/+10
| | | | | | | | | I think there was confusion here between method inlining and the method compiler. Just because the latter isn't yet functional doesn't mean we don't want the former for those targets that support it. Bug: 7179010 Change-Id: If0de856b93615f01dfc5e8977d5c97f550cec15f
* Use 0xde as the poison value after JIT code cache reset.Ben Cheng2012-09-171-2/+6
| | | | | | (cherry-pick of 60497bbcee68d98b2bdcb3fb64682b00d61b942d.) Change-Id: I4f8c1bac2ac3bdc1d931e91f3e2e8038fe4c2b5a
* Optimize those StrictMath routines that are identical to Math routines.Elliott Hughes2012-09-141-6/+16
| | | | | | | We can just use the existing Math intinsics. Bug: 7146208 Change-Id: I9e78d33cf65a5dcc5a7c0133e67bd9c3c1e43f23
* [X86] X86 trace JIT compiler supportDong-Yuan Chen2012-07-202-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides a fully functional x86 trace JIT compiler for Dalvik VM. It is built on top of the existing x86 fast interpreter with bug fixes and needed extension to support trace JIT interface. The x86 trace JIT code generator was developed independent of the existing template-based code generator and thus does not share exactly the same infrastructure. Included in this patch are: * Deprecated and removed the x86-atom fast interpreter that is no longer functional since ICS. * Augmented x86 fast interpreter to provide interfaces for x86 trace JIT compiler. * Added x86 trace JIT code generator with full JDWP debugging support. * Method JIT and self-verification mode are not supported. The x86 code generator uses the x86 instruction encoder/decoder library from the Apache Harmony project. Additional wrapper extension and bug fixes were added to support the x86 trace JIT code generator. The x86 instruction encoder/decoder is embedded inside the x86 code generator under the libenc subdirectory. Change-Id: I241113681963a16c13a3562390813cbaaa6eedf0 Signed-off-by: Dong-Yuan Chen <dong-yuan.chen@intel.com> Signed-off-by: Yixin Shou <yixin.shou@intel.com> Signed-off-by: Johnnie Birch <johnnie.l.birch.jr@intel.com> Signed-off-by: Udayan <udayan.banerji@intel.com> Signed-off-by: Sushma Kyasaralli Thimmappa <sushma.kyasaralli.thimmappa@intel.com> Signed-off-by: Bijoy Jose <bijoy.a.jose@intel.com> Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com> Signed-off-by: Tim Hartley <timothy.d.hartley@intel.com>
* Avoid sign extension in packed-switch.Elliott Hughes2012-07-172-14/+7
| | | | | | | | | | | | | | This code (at least in the ARM version) is trying to assign to r0 and r1 from C by returning a 64-bit result. The mistaken use of signed integers for pointers can lead to sign extension if the JIT code cache is at a sufficiently high address. Bug: 6799823 Bug: 6703991 (cherry-pick from 2d0c1c2dbe44458ebb199c47ce1047f266db5349.) Change-Id: I79e72228b60e195272d11899ac69bb4a76b7402f
* Missing zero-checks in JIT compilerMattias Petersson2012-07-101-1/+9
| | | | | | | | Zero-checks were not generated by the JIT compiler for some instructions. This caused crashes instead of the expected ArithmeticException. Change-Id: Ic8041741a7cccc1bd6b8c3c0723ba55a55af856b
* resolved conflicts for merge of 93a44a28 to jb-dev-plus-aospElliott Hughes2012-05-031-0/+7
|\ | | | | | | Change-Id: I9c1f2e37602bea86e70333d2b274665e99fcbd92
| * [MIPS] Dalvik fast interpreter support and JIT implementationRaghu Gandham2012-05-021-0/+7
| | | | | | | | | | | | | | | | Change-Id: I9bb4f6875b7061d3ffaee73f204026cb8ba3ed39 Signed-off-by: Raghu Gandham <raghu@mips.com> Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Douglas Leung <douglas@mips.com> Signed-off-by: Don Padgett <don@mips.com>
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