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path: root/vm/compiler/codegen/x86/CodegenInterface.cpp
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* Fix the protection of code cache for x86 JITJun Tian2013-08-091-9/+9
| | | | | | | | | | | | During generation of code into code cache an unprotected region of memory does not correspond to protected one, The patch fixes that. Author: Katkov Serguei <serguei.i.katkov@intel.com> (cherry picked from commit 74a62214ef262380371bc21be2a1c42295046fb2) Change-Id: I362a10897564b987c8a3b2dfc9ded8f0a9efd56a
* JIT tuning; set cache size on command linebuzbee2013-05-231-1/+5
| | | | | | | | | | | | | | | | | The tuning knobs for triggering trace compilation for the JIT had not been revisited for several years. In that time, the working set of some applications have significantly increased, leading to frequent cache overlows & flushes. This CL adds the ability to set the maximum size of the JIT's cache on the command line, and we expect to use different settings depending on device configuration (rule of thumb: 1K for each 1M for system RAM, with 2M limit). Additionally, the trace compilation trigger has been tightened to limit the compilation of cold traces. Change-Id: Ice22c5d9d46a93e465c57dd83f50ca3912f1672e
* [x86] Fix errors with WITH_JIT_TUNING definedUdayan Banerji2013-03-291-1/+7
| | | | | | | | This patch makes the necessary changes to pass on correct information to dvmBumpNoChain, so that WITH_JIT_TUNING flag can be enabled for x86 codegen Change-Id: Ia5e5c0406433bf645ef67143d0f1a11a28153a66 Signed-off-by: Udayan Banerji <udayan.banerji@intel.com>
* [x86] Disable Method-JIT for x86 targetUdayan Banerji2013-03-291-0/+3
| | | | | | | Disable Method JIT when compiling for x86 target. Change-Id: Ide0dbd1f602ffd955b901cc152de1e05771fd529 Signed-off-by: Udayan Banerji <udayan.banerji@intel.com>
* Fix -Xjitthreshold (for real this time).Elliott Hughes2013-03-011-1/+1
| | | | | | | | | | | | | My previous "fix" (c89d83e1c05979b68037ad15413fa4460a88e36f) had the conditions reversed, so you _had_ to use -Xjitthreshold to get a non-zero threshold, but when you did, you'd get the default instead of what you asked for! This was spotted by the jank tests. Bug: 8285558 Bug: https://code.google.com/p/android/issues/detail?id=52017 Change-Id: I28270f2573d46929eb10d30789fecf7d5a8cea75
* Fix -Xjitthreshold.Elliott Hughes2013-02-251-1/+3
| | | | | | | | Previously, we'd always overwrite the user-supplied value because the architecture-specific default gets set so late. Bug: https://code.google.com/p/android/issues/detail?id=52017 Change-Id: I469bf9ce599820f5ce3dea346aa8f680deffb0c5
* Fix x86 JIT log spam.Elliott Hughes2012-11-071-1/+0
| | | | | | | | | | | | | | | | | Removes all the E and I logging in cases like these: E( 2901) JIT couldn't compile Ljava/lang/Number;<init> dex_pc=0 I( 2901) codeGenBasicBlockJit returns negative number E( 2901) JIT couldn't compile Ljava/lang/String;<init> dex_pc=0 I( 2901) codeGenBasicBlockJit returns negative number E( 2901) JIT couldn't compile Ljava/util/Hashtable$HashtableEntry;<init> dex_pc=0 I( 2901) codeGenBasicBlockJit returns negative number E( 2901) JIT couldn't compile Ljava/lang/AbstractStringBuilder;<init> dex_pc=0 I( 2901) codeGenBasicBlockJit returns negative number E( 2901) JIT couldn't compile Ljava/util/HashMap$HashMapEntry;<init> dex_pc=0 I( 2901) codeGenBasicBlockJit returns negative number Change-Id: I020c01c11a3840e700bbeb39237da1a6d508be8a
* Don't disable inlining for ARM.Elliott Hughes2012-10-091-2/+1
| | | | | | | | | I think there was confusion here between method inlining and the method compiler. Just because the latter isn't yet functional doesn't mean we don't want the former for those targets that support it. Bug: 7179010 Change-Id: If0de856b93615f01dfc5e8977d5c97f550cec15f
* [X86] X86 trace JIT compiler supportDong-Yuan Chen2012-07-201-0/+1532
This patch provides a fully functional x86 trace JIT compiler for Dalvik VM. It is built on top of the existing x86 fast interpreter with bug fixes and needed extension to support trace JIT interface. The x86 trace JIT code generator was developed independent of the existing template-based code generator and thus does not share exactly the same infrastructure. Included in this patch are: * Deprecated and removed the x86-atom fast interpreter that is no longer functional since ICS. * Augmented x86 fast interpreter to provide interfaces for x86 trace JIT compiler. * Added x86 trace JIT code generator with full JDWP debugging support. * Method JIT and self-verification mode are not supported. The x86 code generator uses the x86 instruction encoder/decoder library from the Apache Harmony project. Additional wrapper extension and bug fixes were added to support the x86 trace JIT code generator. The x86 instruction encoder/decoder is embedded inside the x86 code generator under the libenc subdirectory. Change-Id: I241113681963a16c13a3562390813cbaaa6eedf0 Signed-off-by: Dong-Yuan Chen <dong-yuan.chen@intel.com> Signed-off-by: Yixin Shou <yixin.shou@intel.com> Signed-off-by: Johnnie Birch <johnnie.l.birch.jr@intel.com> Signed-off-by: Udayan <udayan.banerji@intel.com> Signed-off-by: Sushma Kyasaralli Thimmappa <sushma.kyasaralli.thimmappa@intel.com> Signed-off-by: Bijoy Jose <bijoy.a.jose@intel.com> Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com> Signed-off-by: Tim Hartley <timothy.d.hartley@intel.com>
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