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Change-Id: I885fab2470352d0a625c9946d0d5c9111486b713
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Add support for customer device extension
Change-Id: I0402a630ba212d1c5e81cda110f61210f7b60384
(cherry picked from commit 11499df326462bfe25890a35c6abbf019ff7784e)
(cherry picked from commit e03b8f8da9cf4eef64cedf39ce9ca90d26ce5124)
(cherry picked from commit fb360be406f35b9591f12c61936657f03cc5880f)
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Optimize logical shift for ARM JIT.
Whenever logical shift is followed by an add,
try to replace it with an add capable of performing
the shift in the same instruction.
This improves performance for usecases
involving code executing in Dalvik.
Change-Id: I3cb807b6d6ef4b053a19e2703676a93a930eb963
Signed-off-by: Patrik Ryd <patrik.ryd@stericsson.com>
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Without the fix the compiler is still safe since the offending memory access
is a read, though the hoisted distance is non-deterministic. The easiest and
safest fix is to unconditionally hoist a load when it can reach the
scheduling barrier.
BUG: 6300640
Change-Id: Ic83de6dd1e3f602bda6809bfe840db3a097a5176
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See https://android-git.corp.google.com/g/156016
Bug: 5449033
Change-Id: Ic663376d1ad6a6cb14bf81405ad9afd247cf2f60
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real problem as we will only see an undefined value if the list has no instructions other than NOPs.
Change-Id: I055510831ca1c566e2daa2b4b2acbaa655fa735a
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1) Only optimize each block once. Strictly speaking this is not a
correctness issue however it triggers the subsequent problem.
2) Ignore dead instructions.
1: ldr r2, [r5, #8]
2: ldr r3, [r5, #8](nop)
3: str r3, [r5, #4]
4: movs r3, r2
When using instruction 1 to initiate redundant ld/st eliminations, if
instruction 2 (which is already dead) is not ignored, it will be turned
into a "mov r3, r2" and that will clobber r3 used by the str.
Change-Id: I6b9a88d3688889d917b90f4b8f55278df1701c6a
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Change-Id: Idffbdb02c29e2be03a75f5a0a664603f2299504a
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