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Change-Id: I885fab2470352d0a625c9946d0d5c9111486b713
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Add support for customer device extension
Change-Id: I0402a630ba212d1c5e81cda110f61210f7b60384
(cherry picked from commit 11499df326462bfe25890a35c6abbf019ff7784e)
(cherry picked from commit e03b8f8da9cf4eef64cedf39ce9ca90d26ce5124)
(cherry picked from commit fb360be406f35b9591f12c61936657f03cc5880f)
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This reverts commit aa897b06230453519c4ec636f229c72ac0015897.
Revert "Reject dex files that attempt to use unspecified class access flags"
This reverts commit 2f824d3e4835479409724ea02d0a23114cd4ff81.
Revert "If dalvik wants ASCII casing, it needs to ask for it."
This reverts commit d91250308fc4c423d11955174c21566fa19df07c.
Revert "JIT: Combine add with shift and offset for array load & store."
This reverts commit a9ecd84e5f5423a1ba6bbb2bb9256b0dc382de44.
Revert "JIT: Use rsb and shift in easy multiply."
This reverts commit 25b94295a57290623e34882e7fd86ea10928a54e.
Revert "Excessive JNI: Dump HPROF dump."
This reverts commit 8d30a7402d48c4ffe2bf28ede78c6b3b52b15304.
Revert "dalvik/vm: Dalvik startup with a low memory footprint"
This reverts commit 15726c81059b74bf2352db29a3decfc4ea9c1428.
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Optimize long and double array load / store for ARM JIT.
Array load / store performs a logical shift left and add,
replace it with add capable of performing shift in the
same instruction.
Array load / store performs an add instead of using offset
for vldr/vstr. Replace the add and vldr/vstr with a vldr/vstr
that is capable of handling offset.
This improves performance for usecases involving long and double
array code execution in Dalvik. E.g WindowOrientation.
Change-Id: I90220c349ab936cdba1987139ccdf4dc31d7bbb0
Signed-off-by: Patrik Ryd <patrik.ryd@stericsson.com>
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Change 256211 (JIT: Performance Fix for const doubles) introduced a
defect that can cause the JIT to use the wrong floating point
double constant in traces in which the following conditions hold:
o Two (or more) different 64-bit floating point constants are used.
o The physical register holding the first constant is still live
at the time the second constant is used.
o The low 32 bits of the two constants are identical.
In this situation, the load/copy optimization pass will incorrectly
determine that the two constants are the same, delete the load of
the second constant and re-use the first constant value.
Note: this problem only occurs with 64-bit floating point literals.
64-bit long literals are unaffected.
This CL works around the problem, and a subsequent CL will rework
disambiguation of 64-bit immediates in a somewhat cleaner fashion.
Change-Id: I33baf78402bab58d9b0ca46189f26491c2b2a751
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Some recent Arm processors take a performance hit when
creating a floating point double by loading it as a pair of singles.
Legacy code to support soft floating point doubles as a pair of core
registers loaded double immediates in this way.
With the CL, we handle double immediates as a single unit.
Change-Id: I91aca9da6d4b38e180479dd8f75c82dbc7b4a526
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A Thumb2 pc-relative load is slipped into the codegen stream even though
the selected platform is armv5te (eg the emulator).
Bug: 4399358
Change-Id: I61dd6853cad6c82de43f384814c903dd9f3ae302
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Change-Id: Idffbdb02c29e2be03a75f5a0a664603f2299504a
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